Methods and devices for reducing DC current consumption of a multi-stage LNA amplifier. According to one aspect, first and second amplification stages are stacked to provide a common conduction path of a DC current. The first stage includes a common-source amplifier, the second stage includes a common-drain amplifier. Coupling between the two stages is provided by series connection of load inductors of the respective stages and a capacitor coupled at a common node between the inductors. According to another aspect, a current splitter circuit is used to split a current to the first stage according to two separate conduction paths, one common path to the two stages, and another separate from the second stage. According to yet another aspect, the current splitter circuit includes a feedback loop that controls the splitting of the current so to maintain a constant current through the common path.

According to various embodiments, an electronic device may include: a communication processor, a radio frequency (RF) integrated circuit (RFIC) configured to receive a signal output from the communication processor and to modulate the signal into an RF signal, a power management circuit, a first power amplifier configured to amplify an RF signal output from the RFIC based on power supplied from the power management circuit, a second power amplifier configured to amplify the RF signal output from the RFIC based on the power supplied from the power management circuit, at least one capacitor connected in parallel to a power supply terminal of the first power amplifier, and at least one switch connected between the power supply terminal and the at least one capacitor, wherein the communication processor is configured to: identify a power amplification mode based a frequency band of the RF signal, and control the at least one switch by outputting a control signal corresponding to the identified power amplification mode.

Systems are provided for RF high power generation. An arrangement includes an RF power combiner, at least one RF power amplifier, a switch, a control unit, and a transmission line. The RF power combiner has at least one RF input and at least one RF output. The RF power amplifier is electrically connected to the RF input via the transmission line. The switch is included in the transmission line. The switch is configured to control, by a switching action, transmission of a RF signal from the RF power amplifier to the RF input via the transmission line. The control unit is electrically connected to the switch. The control unit is configured to control the switching action of the switch. The control unit is electrically connected to the switch via the same transmission line.

An active electronically scanned array (AESA) includes a plurality of power amplifiers including first power amplifiers and second power amplifiers. The first power amplifiers are biased by a first drain voltage. The second power amplifiers are biased by a second drain voltage. The second drain voltage is different from the first drain voltage.

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

A power amplifier apparatus is provided. The power amplifier apparatus includes a number of multi-stage power amplifiers and a bias circuit configured to generate a number of bias signals (e.g., bias current or bias voltage) to control (e.g., activate or deactivate) the multi-stage power amplifiers. In examples disclosed herein, only one of the multi-stage power amplifiers is activated at a given time. In this regard, the bias circuit can generate the bias signals to collectively activate one of the multi-stage power amplifiers, while deactivating the rest of the multi-stage power amplifiers. As such, it may be possible to control a larger number of power amplifier stages based on a smaller number of bias signals. As a result, it may be possible to eliminate a biasing bump pad(s) from the power amplifier apparatus, thus helping to reduce the footprint and cost of the power amplifier apparatus.

The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE). The present disclosure is to amplify transmission signals in a wireless communication system, and a transmitting device may include an antenna array including a plurality of antenna elements, a plurality of amplification chains for amplifying signals transmitted through the plurality of the antenna elements, and a power supply line for supplying powers to the plurality of the amplification chains. Herein, the powers used by power amplifiers included in at least one amplification chain of the plurality of the amplification chains may be divided by filtering or by independent pads and branch-lines.

A bias circuit for a Doherty amplifier, characterized by comprising: an input port with an input impedance, wherein the input port is configured to receive a bias signal from a power supply; a first output port configured to provide a bias signal to an amplifier; a second output port configured to provide a bias signal to an amplifier; a two port impedance transformer with an input connected to the first input port, and an output of the two port impedance transformer having an intermediate impedance; an in-phase N-port dividing impedance transformer with an input connected to the output of the two port impedance transformer, wherein the in-phase N-port dividing impedance transformer comprises: a first output connected to the first output port having a first output impedance; and a second output connected to the second output port having a second output impedance.

The present disclosure relates to a device comprising a first transimpedance amplifier comprising a first amplification stage with a first MOS transistor, a second transimpedance amplifier comprising a second amplification stage with a second MOS transistor, and a current source series-connected with the first and second amplification stages, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor.

A bidirectional bipolar transistor switch arrangement, including: a first bipolar transistor and a second bipolar transistor connected in anti-parallel between a first terminal and a second terminal, a resistor connected to the base of the first bipolar transistor and the second bipolar transistor and to a control terminal, a first diode connected with anode to the first terminal, and a second diode connected with anode to the second terminal, the first diode and the second diode being connected via respective cathodes to a supply terminal. The bidirectional bipolar transistor switch arrangement is able to control the power supply within a daisy chain with low drop voltage.