A switched-capacitor amplifier comprises a comparator, sample and amplification capacitors and a controller to control charge and discharge current sources in dependence on an output signal of the comparator. A closed loop control circuit is configured to determine the delay of the comparator and control an offset of the comparator in response to the determined delay.

An output stage of an operational amplifier includes a low voltage (LV) metal oxide semiconductor (MOS) device and a dynamic current limit circuit. An output current of the operational amplifier flows through the LV MOS device. The dynamic current limit circuit is configured to sense a drain voltage of the LV MOS device and increase a clamping voltage for the LV MOS device when the drain voltage of the LV MOS device is less than a threshold voltage.

In an embodiment an amplifier includes a first MOS transistor having a drain connected to an output of the amplifier and a source coupled to a first node configured to receive a first power supply potential, a first capacitive element connected between an input of the amplifier and a gate of the first MOS transistor, a first current source connecting the drain of the first MOS transistor to a second node configured to receive a second power supply potential and a resistive element and a second capacitive element connected in parallel between the gate and the drain of the first MOS transistor, the resistive element including a switched capacitor.

The present invention is in the field of booster stage circuit for a power amplifier, and an external supply voltage power amplifier comprising said booster stage circuit, such as for amplifying an electronic signal to a speaker system. These amplifiers may be provided with an external supply voltage.

An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.

The present invention provides an amplifier circuit, wherein the amplifier circuit includes an input terminal, a capacitor, an amplifier, a feedback circuit and an aliasing tone cancellation circuit. The input terminal is configured to receive a first input signal. The capacitor is coupled to the input terminal. The amplifier is configured to receive the input signal through the capacitor to generate an output signal. The feedback circuit is coupled between an input node and an output node of the amplifier, and is configured to generate a feedback signal according to the output signal, wherein the feedback circuit includes a storage block including a switched-capacitor. The aliasing tone cancellation circuit is coupled between the input terminal of the amplifier circuit and the input node of the amplifier, and configured to generate a signal to cancel or reduce an aliasing tone of the feedback signal according to the input signal.

The present invention discloses a switched capacitor amplifying apparatus having gain adjustment mechanism. An amplifier includes an input terminal and an output terminal. A capacitor circuit includes a sampling capacitor circuit, a load capacitor and a level-shifting capacitor array. The sampling capacitor circuit includes two sampling input terminals and a sampling output terminal to receive an input signal from a signal input terminal and output a sampled result to the input terminal of the amplifier. The load capacitor and the level-shifting capacitor array are charged according to the output terminal of the amplifier and the load capacitor is subsequently charged by the level-shifting capacitor array to accomplish level-shifting such that the load capacitor generates an output signal through a signal output terminal. A control circuit determines an enabling combination of level-shifting capacitors included in the level-shifting capacitor array to determine an equivalent capacitance, to further determine a loop gain.

The present disclosure discloses a switched capacitor amplifier apparatus for improving level-shifting. An amplifier includes input terminals and output terminals. Two capacitor circuits correspond to signal input terminals and signal output terminals and each includes a sampling capacitor circuit, a load capacitor and a level-shifting capacitor. The sampling capacitor circuit samples an input signal from one of the signal input terminals to one of the input terminals. An electrical charge neutralizing capacitor is coupled between the output terminals. The load capacitor and the level-shifting capacitor are charged according to an output from one of the output terminals in an estimation period. The level-shifting capacitor charges the load capacitor in a level-shifting period to generate an output signal at one of the signal output terminals. The electrical charge neutralizing capacitor receives and provides electrical charges from the output terminals to the level-shifting capacitor respectively in the estimation period and the level-shifting period.

A circuit may include a two-stage feedforward compensated operational transconductance integrated amplifier, and the two-stage feedforward compensated operational transconductance integrated amplifier may include an input terminal, an output terminal, a signal path between the input terminal and the output terminal, the signal path comprising a first signal path gain stage and a second signal path gain stage, and ripple rejection circuitry coupled between the input terminal and an intermediate node of the signal path located between the first signal path gain stage and the second signal path gain stage. The ripple rejection circuitry may include a first ripple rejection circuitry gain stage coupled at its input to the input terminal and coupled at its output to an input terminal of a chopper circuit, a notch filter coupled at its input to an output terminal of the chopper circuit, and a second ripple rejection circuitry gain stage coupled at its input to an output terminal of the notch filter and coupled at its output to the intermediate node.

The invention relates to an electrical circuit in the form of a transimpedance amplifier stage, and to a method for operating this circuit. The invention furthermore relates to a circuit containing at least one signal amplifier that has at least one output connection, at least one input connection or at least one pair of differential input connections and at least two voltage supply connections, one of which may also be an earth or ground connection, wherein the signal amplifier has at least one additional connection that is connected internally to at least one of the input connections or the input connection via at least one further component, for example a diode.