H03F3/16

Charge-steering amplifier-based amplifier circuit
20230040066 · 2023-02-09 ·

An amplifier circuit, which has a first output terminal and a second output terminal, includes a first charge-steering amplifier, a second charge-steering amplifier, a first switch, and a second switch. The first charge-steering amplifier includes a first input terminal, a second input terminal, a first capacitor, and a second capacitor, and is used for amplifying a first input signal in a first operation period. The second charge-steering amplifier includes a third input terminal, a fourth input terminal, the first capacitor, and the second capacitor, and is used for amplifying a second input signal in a second operation period. The first capacitor and the second capacitor charge during the first operation period and discharge during the second operation period.

Charge-steering amplifier-based amplifier circuit
20230040066 · 2023-02-09 ·

An amplifier circuit, which has a first output terminal and a second output terminal, includes a first charge-steering amplifier, a second charge-steering amplifier, a first switch, and a second switch. The first charge-steering amplifier includes a first input terminal, a second input terminal, a first capacitor, and a second capacitor, and is used for amplifying a first input signal in a first operation period. The second charge-steering amplifier includes a third input terminal, a fourth input terminal, the first capacitor, and the second capacitor, and is used for amplifying a second input signal in a second operation period. The first capacitor and the second capacitor charge during the first operation period and discharge during the second operation period.

SYSTEM AND METHOD OF MANAGING MONITORING SIGNALS ASSOCIATED WITH FANS OF INFORMATION HANDLING SYSTEMS
20230236645 · 2023-07-27 ·

In one or more embodiments, a fan circuit may be configured with an input of a first amplifier coupled to a revolution indicator associated with a fan; an output of the first amplifier coupled to an input of a second amplifier; and a power supply input of the second amplifier coupled to a first contact of a first connector. In one or more embodiments, the first contact of the first connector may be coupled to a first contact of a second connector to drive a resistive load coupled to the first contact of the second connector; a second contact of the first connector may be coupled to a second contact of the second connector to provide a reference voltage to the second amplifier; and the second amplifier may provide amplified signals to the first contact of the first connector based at least on signals received from the revolution indicator.

SYSTEM AND METHOD OF MANAGING MONITORING SIGNALS ASSOCIATED WITH FANS OF INFORMATION HANDLING SYSTEMS
20230236645 · 2023-07-27 ·

In one or more embodiments, a fan circuit may be configured with an input of a first amplifier coupled to a revolution indicator associated with a fan; an output of the first amplifier coupled to an input of a second amplifier; and a power supply input of the second amplifier coupled to a first contact of a first connector. In one or more embodiments, the first contact of the first connector may be coupled to a first contact of a second connector to drive a resistive load coupled to the first contact of the second connector; a second contact of the first connector may be coupled to a second contact of the second connector to provide a reference voltage to the second amplifier; and the second amplifier may provide amplified signals to the first contact of the first connector based at least on signals received from the revolution indicator.

SOLID-STATE IMAGING DEVICE AND AMPLIFIER ARRAY

A solid-state imaging device includes M pixel units to and a correction unit. The pixel unit includes a main amplifier, a capacitive element, a first switch, a second switch, a photodiode, a feedback capacitive element, and an initialization switch. The correction unit includes a null amplifier, a capacitive element, a first switch, and a second switch. An effective offset voltage of the main amplifier is small.

SOLID-STATE IMAGING DEVICE AND AMPLIFIER ARRAY

A solid-state imaging device includes M pixel units to and a correction unit. The pixel unit includes a main amplifier, a capacitive element, a first switch, a second switch, a photodiode, a feedback capacitive element, and an initialization switch. The correction unit includes a null amplifier, a capacitive element, a first switch, and a second switch. An effective offset voltage of the main amplifier is small.

Drain sharing split LNA
11705873 · 2023-07-18 · ·

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

Drain sharing split LNA
11705873 · 2023-07-18 · ·

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

Transistor and amplifier thereof
11699980 · 2023-07-11 · ·

A transistor comprises a drain, a gate, a source, a body terminal and a body resistance. The drain is connected to a supply voltage line to receive a supply voltage. The gate is connected to a control voltage line to receive a control voltage. The source is connected to a input line to receive a input radio frequency signal. The body terminal is connected to the drain. The body resistance is disposed between the drain and the body terminal. By the foregoing configuration, the leakage current of the substrate is reduced and the threshold voltage of the transistor is reduced to conform to the present low power design.

Transistor and amplifier thereof
11699980 · 2023-07-11 · ·

A transistor comprises a drain, a gate, a source, a body terminal and a body resistance. The drain is connected to a supply voltage line to receive a supply voltage. The gate is connected to a control voltage line to receive a control voltage. The source is connected to a input line to receive a input radio frequency signal. The body terminal is connected to the drain. The body resistance is disposed between the drain and the body terminal. By the foregoing configuration, the leakage current of the substrate is reduced and the threshold voltage of the transistor is reduced to conform to the present low power design.