A digital predistortion (DPD) system includes an input configured to receive an input signal. In some examples, a first signal path configured to generate a first signal based on the input signal. In some examples, an error model provider configured to generate an error model signal modeled after a gate bias error voltage associated with the DPD system. In some examples, a first combiner configured to combine the first signal and the error model signal to generate a first intermediate signal, and the DPD system generates an output signal based at least on the first intermediate signal.

Disclosed is power amplifier circuitry having a bipolar junction power transistor with a base, a collector, and an emitter. The power amplifier circuitry includes bias correction sub-circuitry configured to generate a compensation current substantially opposite in phase and substantially equal in magnitude to an error current passed by a parasitic base-collector capacitance inherently coupled between the base and collector, wherein the bias correction sub-circuitry has a compensation output coupled to the base and through which the compensation current flows to substantially cancel the error current.

A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

An impedance matching circuit includes a radiofrequency terminal and a series circuit connected to the radiofrequency terminal, wherein the series circuit comprises at least one reactance and at least one switching element having a drive input. A drive circuit is connected to the drive input and a coupler is connected to the drive circuit so as to an enable signal input. The impedance matching circuit enables short switching times and low losses in the at least one switching element.

Fast envelope tracking systems are provided herein. In certain embodiments, an envelope tracking system for a power amplifier includes a switching regulator and a differential error amplifier configured to operate in combination with one another to generate a power amplifier supply voltage for the power amplifier based on an envelope of a radio frequency (RF) signal amplified by the power amplifier. The envelope tracking system further includes a differential envelope amplifier configured to amplify a differential envelope signal to generate a single-ended envelope signal that changes in relation to the envelope of the RF signal. Additionally, the differential error amplifier generates an output current operable to adjust a voltage level of the power amplifier supply voltage based on comparing the single-ended envelope signal to a reference signal.

Fast envelope tracking systems are provided herein. In certain embodiments, an envelope tracking system for a power amplifier includes a switching regulator and a differential error amplifier configured to operate in combination with one another to generate a power amplifier supply voltage for the power amplifier based on an envelope of a radio frequency (RF) signal amplified by the power amplifier. The envelope tracking system further includes a differential envelope amplifier configured to amplify a differential envelope signal to generate a single-ended envelope signal that changes in relation to the envelope of the RF signal. Additionally, the differential error amplifier generates an output current operable to adjust a voltage level of the power amplifier supply voltage based on comparing the single-ended envelope signal to a reference signal.

An antenna controller for an antenna is configured to request and receive status information comprising power amplifier data of at least two adjustable power amplifiers. The antenna controller is configured to determine at least one target setting for the at least two adjustable power amplifiers based on the received power amplifier data, and to send the at least one target setting for the at least two adjustable power amplifiers. Hereby it is made possible for an antenna controller to set an overall target for multiple adjustable power amplifiers of the antenna. This in turn makes it possible to make the settings for the adjustable power amplifiers such that the transmission signal becomes linearized by a shared digital pre-distorter when transmitting using the multiple adjustable power amplifiers of the antenna. A Radio Frequency Integrated Circuit controller for an antenna subarray is configured to control at least one adjustable power amplifier.

An antenna controller for an antenna is configured to request and receive status information comprising power amplifier data of at least two adjustable power amplifiers. The antenna controller is configured to determine at least one target setting for the at least two adjustable power amplifiers based on the received power amplifier data, and to send the at least one target setting for the at least two adjustable power amplifiers. Hereby it is made possible for an antenna controller to set an overall target for multiple adjustable power amplifiers of the antenna. This in turn makes it possible to make the settings for the adjustable power amplifiers such that the transmission signal becomes linearized by a shared digital pre-distorter when transmitting using the multiple adjustable power amplifiers of the antenna. A Radio Frequency Integrated Circuit controller for an antenna subarray is configured to control at least one adjustable power amplifier.

A packaging substrate can include a first surface and a second opposing surface, the first surface having a mounting region configured to receive electronic components, and electrical contacts formed on the second opposing surface. A saw street region can surround the mounting region and the electrical contacts, a metal layer and a solder mask layer being formed within the saw street region on the second opposing surface, and the solder mask layer being formed over the metal layer. An electronic module can include a packaging substrate including a first surface and a second opposing surface, the first surface including a mounting region. A plurality of electronic components can be mounted on the mounting region. A ground pad can be formed on the second opposing surface of the packaging substrate, the ground pad including a solder mask layer formed thereon, the solder mask layer having a plurality of openings.