Patent classifications
H03F3/3011
HIGH LINEARITY INDUCTORLESS LNA
An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.
High linearity inductorless LNA
An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.
COMMON-MODE COMPENSATION TECHNIQUE FOR PROGRAMMABLE GAIN AMPLIFIERS
Certain aspects of the present disclosure provide methods and apparatus for adjusting a bandwidth of an amplifier (e.g., a programmable gain amplifier (PGA)). In certain aspects, the PGA generally includes at least one amplification stage having an input and an output, a plurality of compensation capacitors, and at least one first switch configured to selectively couple at least one capacitor of the plurality of compensation capacitors between the input and the output of the at least one amplification stage. In certain aspects, the amplifier includes at least one second switch configured to selectively couple the at least one capacitor to a node such that the at least one capacitor is coupled to only one of the output or the node, where a voltage at the node is a differential mode (DM) reference potential for the amplification stage.
Voltage follower circuit
A voltage follower circuit includes a first MOS transistor which has a source connected to an input port, a second MOS transistor which has a source connected to an output port and has a gate and a drain connected to a gate of the first MOS transistor, a first constant current source connected between a drain of the first MOS transistor and a second power supply terminal, a second constant current source connected between the drain of the second MOS transistor and the second power supply terminal, and a depletion type third MOS transistor which has a gate connected to the drain of the first MOS transistor, has a drain connected to a first power supply terminal, and has a source connected to the output port.