H03F3/45479

AUDIO CIRCUIT
20230238926 · 2023-07-27 ·

A class D amplifier circuit receives an analog audio signal with a first reference voltage as its center level, and outputs an output pulse signal having a duty cycle that corresponds to the analog audio signal. A bias circuit generates a second reference voltage having a voltage level obtained as a division of the first reference voltage and the power supply voltage. A periodic voltage generating circuit of the class D amplifier circuit generates a periodic voltage having a triangle waveform or otherwise a sawtooth waveform having an amplitude that corresponds to the second reference voltage.

DIFFERENTIAL DRIVER

In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.

High-linearity differential to single ended buffer amplifier
11502649 · 2022-11-15 · ·

A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.

Differential RF power detector with common mode rejection

A power detector circuit that rejects the common mode portion of a differential signal is disclosed. The circuit includes a differential input having first and second input nodes. Differential and common mode circuit paths are coupled to the differential input. The common mode circuit path includes first and second capacitors coupled to respective first terminals of first and second input nodes of the differential input. The second terminal of each of the first and second capacitors is coupled to a gate terminal of a first bias transistor. The common mode circuit path is configured to reject a common mode portion of a differential input signal provided to the differential input such that a differential output signal is indicative of an amount of power of a differential portion of the differential input signal.

Low voltage high speed CMOS line driver without tail current source

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.

AMPLIFIER CIRCUITRY

This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (IN.sub.N) and an amplifier output (V.sub.OUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (IN.sub.N) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (IN.sub.P) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.

Amplifiers with wide input range and low input capacitance
11251760 · 2022-02-15 · ·

Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

DIFFERENTIAL SIGNALING TRANSMISSION SYSTEMS

A transceiver that may be implemented in low-voltage differential signaling (LVDS) transmission system or a multipoint LVDS transmission system, and corresponding systems are disclosed herein. The transceiver can filter a common-mode component of a differential input signal input into the transceiver while maintaining a high impedance for a differential-mode component of the differential input signal. The transceiver utilizes teeter-totter circuitry to maintain the high impedance for the differential-mode component of the differential input signal.

Amplifier circuitry
11368134 · 2022-06-21 · ·

This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (IN.sub.N) and an amplifier output (V.sub.OUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (IN.sub.N) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (IN.sub.P) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.

TRIMMING CIRCUIT OF DIFFERENTIAL AMPLIFIER
20220166390 · 2022-05-26 ·

The present application discloses a trimming circuit of differential amplifier, wherein an output end of the differential amplifier is coupled to a first input end of the differential amplifier through a first voltage-dividing resistor; a shift voltage is coupled to a second input end of the differential amplifier through a second voltage-dividing resistor; the first voltage-dividing resistor and the second voltage-dividing resistor respectively form a T-shaped resistor network structure; the T-shaped resistor network structure comprises: a k-bit resistive network coupled to a T-shaped node and a reference power supply end, wherein a low n-bits of the k-bit resistive network is an R-2R resistive network, and part of branches are connected in series with at least one trimming resistor, and each trimming resistor is connected in parallel with a switch.