In methods and systems for filtering an information input signal, a system may have: a first filter unit filtering an input signal at an initial subinterval in a current update interval according to parameters associated to the preceding update interval, the parameters being scaled by a first scaling factor changing towards 0; and a second filter unit filtering a second filter input signal, based on the output of the first filter unit, at the initial subinterval, according to parameters associated to the current update interval, the parameters being scaled by a second scaling factor changing from 0, or a value close to 0, toward a value more distant from 0.

A signal processing system is described. The signal processing system includes at least one signal processing path and a control module. The at least one signal processing path includes at least one signal input and at least two filter units. The at least two filter units include at least one hardware filter unit. The at least one signal input is connectable to at least one external electronic component. The control module is connected to the signal input and to the at least two hardware filter units. The control module is configured to determine a frequency response deviation being associated with the at least one external electronic component. The control module further is configured to reconfigure the at least one hardware filter unit such that the frequency response deviation is compensated at least partially. Further, a signal processing method for adapting filter coefficients of a signal processing system is described.

A signal processing system is described. The signal processing system includes at least one signal processing path and a control module. The at least one signal processing path includes at least one signal input and at least two filter units. The at least two filter units include at least one hardware filter unit. The at least one signal input is connectable to at least one external electronic component. The control module is connected to the signal input and to the at least two hardware filter units. The control module is configured to determine a frequency response deviation being associated with the at least one external electronic component. The control module further is configured to reconfigure the at least one hardware filter unit such that the frequency response deviation is compensated at least partially. Further, a signal processing method for adapting filter coefficients of a signal processing system is described.

An optical communication apparatus includes a level detector, an FIR filter, and a adjustor. The level detector detects level information that discriminates a change in a multi-value level based on an input signal used in a multi-value amplitude modulation system. The FIR filter compensates a signal band of the input signal in accordance with tap coefficients of a plurality of multipliers. The adjustor corrects the tap coefficient of each of the multipliers included in the FIR filter based on the level information detected in the level detector.

An optical communication apparatus includes a level detector, an FIR filter, and a adjustor. The level detector detects level information that discriminates a change in a multi-value level based on an input signal used in a multi-value amplitude modulation system. The FIR filter compensates a signal band of the input signal in accordance with tap coefficients of a plurality of multipliers. The adjustor corrects the tap coefficient of each of the multipliers included in the FIR filter based on the level information detected in the level detector.

In methods and systems for filtering an information input signal, a system may have: a first filter unit filtering an input signal at an initial subinterval in a current update interval according to parameters associated to the preceding update interval, the parameters being scaled by a first scaling factor changing towards 0; and a second filter unit filtering a second filter input signal, based on the output of the first filter unit, at the initial subinterval, according to parameters associated to the current update interval, the parameters being scaled by a second scaling factor changing from 0, or a value close to 0, toward a value more distant from 0.

Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop filter may further include a first summing node having an output coupled to an input of the first integrator. Further, the delta-sigma loop filter may include a feedforward path from an input of the delta-sigma loop filter to a first input of the first summing node. The delta-sigma loop filter may also include a first feedback path from an output of the quantizer to a second input of the first summing node.

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta sigma loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.

A Scalable Finite Impulse Response (SFIR) filter includes a pre-processing section, a post-processing section, and a finite impulse response (FIR) Matrix. The FIR Matrix is coupled to the pre-processing section and the post-processing section. The FIR Matrix includes a plurality of filter taps and a plurality of signal paths. Each filter tap of the plurality of filter taps has at least a first input, a second input, a multiplexer coupled to the first input and the second input, and a first flip-flop coupled to an output of the multiplexer. The plurality of signal paths are arranged to allow re-configurable data throughput between the each filter tap of the plurality of filter taps.

A Scalable Finite Impulse Response (SFIR) filter is disclosed. The SFIR filter includes a pre-processing section, a post-processing section, and a finite impulse response (FIR) Matrix. The FIR Matrix includes a plurality of filter taps and a plurality of signal paths in signal communication with each filter tap. The plurality of signal paths are arranged to allow re-configurable data throughput between the each filter tap and the pre-processing section and post-processing section are in signal communication with the FIR Matrix.