A power semiconductor circuit is provided for clamping the voltage across the circuit when a power semiconductor switch is opened (i.e., turned off). The circuit may include a first surge arrester and a first semiconductor switch coupled in parallel with the power semiconductor switch. The first semiconductor switch is coupled in series with the first surge arrester. A second surge arrester may be coupled to the gate of the first semiconductor switch to control current flow through the first semiconductor switch and the first surge arrester.

A semiconductor switching circuit, for use in a HVDC power converter, comprising: a main semiconductor switching element, including first and second connection terminals between which current flows from the first connection terminal to the second connection terminal and an auxiliary semiconductor switching element electrically connected between the first and second connection terminals thereof, and a control unit, operatively connected to auxiliary semiconductor switching element and programmed to control the switching element to create an alternative current path between the first and second connection terminals by at least two of: a fully-on mode in which the switching element is operated at its maximum rated base current or gate voltage; a pulsed switched mode in which the switching element is turned on and off; and an active mode in which the switching element is operated with a continuously variable base current or gate voltage.

A semiconductor switching string includes a plurality of series-connected semiconductor switching assemblies, each having a main semiconductor switching element that includes first and second connection terminals. The main semiconductor switching element also has an auxiliary semiconductor switching element electrically connected between the first and second connection terminals. Each semiconductor switching assembly also includes a control unit configured to switch on a respective auxiliary semiconductor switching element to selectively create an alternative current path between the first and second connection terminals whereby current is diverted to flow through the alternative current path to reduce the voltage across the corresponding main semiconductor switching element. The or each control unit is further configured to switch on the auxiliary semiconductor switching element when the voltage across the corresponding main semiconductor switching element differs from a voltage reference derived from the voltage across all of the main semiconductor switching elements.

A power semiconductor circuit is provided for clamping the voltage across the circuit when a power semiconductor switch is opened (i.e., turned off). The circuit may include a first surge arrester and a first semiconductor switch coupled in parallel with the power semiconductor switch. The first semiconductor switch is coupled in series with the first surge arrester. A second surge arrester may be coupled to the gate of the first semiconductor switch to control current flow through the first semiconductor switch and the first surge arrester.

A solid state switch for connecting and disconnecting an electrical device has at least one FET-type device and at least one thyristor-type device coupled in parallel to the at least one FET-type device. A gate driver is operative to send gate drive signals to the at least one FET-type device and to the at least one thyristor-type device for providing current to the electrical device. The gate driver is constructed to control a split of the current as between the at least one FET-type device and the at least one thyristor-type device.

A semiconductor switching string includes series-connected semiconductor switching assemblies, each having a main semiconductor switching element that, when switched on, conducts current flow from a first terminal to a second terminal, and that, while turning off, transitions from a reverse recovery mode in which a reverse recovery current flows from the second terminal to the first terminal to a blocking mode in which no current flows. Each main semiconductor switching element has an active auxiliary circuit, each including an auxiliary semiconductor switching element and a resistive element. Each control unit is connected with each auxiliary semiconductor switching element. Each control unit switches a respective auxiliary semiconductor switching element into a conducting state to divert current through the corresponding resistive element. Each control unit having the auxiliary semiconductor switching elements in their conducting state simultaneously while each main semiconductor switching element is operating in reverse recovery mode or blocking mode.

A semiconductor switching circuit, for use in a HVDC power converter, comprising: a main semiconductor switching element, including first and second connection terminals between which current flows from the first connection terminal to the second connection terminal and an auxiliary semiconductor switching element electrically connected between the first and second connection terminals thereof, and a control unit, operatively connected to auxiliary semiconductor switching element and programmed to control the switching element to create an alternative current path between the first and second connection terminals by at least two of: a fully-on mode in which the switching element is operated at its maximum rated base current or gate voltage; a pulsed switched mode in which the switching element is turned on and off; and an active mode in which the switching element is operated with a continuously variable base current or gate voltage.

A semiconductor switching string includes series-connected semiconductor switching assemblies, each having a main semiconductor switching element that, when switched on, conducts current flow from a first terminal to a second terminal, and that, while turning off, transitions from a reverse recovery mode in which a reverse recovery current flows from the second terminal to the first terminal to a blocking mode in which no current flows. Each main semiconductor switching element has an active auxiliary circuit, each including an auxiliary semiconductor switching element and a resistive element. Each control unit is connected with each auxiliary semiconductor switching element. Each control unit switches a respective auxiliary semiconductor switching element into a conducting state to divert current through the corresponding resistive element. Each control unit having the auxiliary semiconductor switching elements in their conducting state simultaneously while each main semiconductor switching element is operating in reverse recovery mode or blocking mode.

A semiconductor switching string including a series-connected switching assemblies. Each assembly has a main switching element including first and second connection terminals which current flows between when the main switching element is on. The main element has an auxiliary element between the connection terminals. The string includes a local control unit connected with each auxiliary element which are programmed to switch an auxiliary element to create an alternative current path between the connection terminals that diverts current through to reduce the voltage across the corresponding main switching element. The local unit is programmed to control switching an auxiliary element to a fully-on mode in which the auxiliary element is at maximum rated base current, a pulsed mode which turns the auxiliary element on and off and/or an active mode operating the auxiliary element with a continuously variable base current. The string includes a higher level control unit programmed to implement the modes.

A solid state switch for connecting and disconnecting an electrical device has at least one FET-type device and at least one thyristor-type device coupled in parallel to the at least one FET-type device. A gate driver is operative to send gate drive signals to the at least one FET-type device and to the at least one thyristor-type device for providing current to the electrical device. The gate driver is constructed to control a split of the current as between the at least one FET-type device and the at least one thyristor-type device.