A driver circuit may be configured to control a power switch. The driver circuit may comprise an output pin configured to deliver signals to a gate of the power switch to control an ON/OFF state of the power switch, and a comparator configured to compare a gate-to-source voltage of the power switch to a first threshold when the power switch is ON and to compare the gate-to-source voltage of the power switch to a second threshold when the power switch is OFF.

A driving apparatus for driving a switching device is provided, the driving apparatus including: a high potential line; a high-potential-side switching control unit configured to perform switching as to whether to connect a control terminal of the switching device to the high potential line; a first resistor element located on a high-potential side and disposed in series with the high-potential-side switching control unit on a path from the control terminal of the switching device to the high potential line; a high-potential-side capacitor provided in parallel with the first resistor element on the path from the control terminal of the switching device to the high potential line; and a high-potential-side discharge control unit configured to control whether to discharge the high-potential-side capacitor.

A control unit has an input with a positive and negative connectors. The control unit also includes an output and with an electronic switch. The switch has a first connector, a second connector and a control connector, and has an on-state resistance between its first and second connector that depends on a control voltage at the control connector of the switch. The first connector is connected to the connector for the positive potential of the input, the second connector is connected to the connector for the positive potential of the output, and the control connector is connected to a trigger circuit. A second controllable switch is also included with a first connector connected to the second connector of the first switch, a second connector connected to the control connector of the first switch, and a control connector connected to the connector for the negative potential of the input.

A gate drive circuit that drives a power device by controlling charge and discharge of gate capacitance of the power device includes: a first semiconductor switch that charges the gate capacitance by being brought into conduction according to a first control signal; a second semiconductor switch that discharges the gate capacitance by being brought into conduction according to a second control signal; and a slew rate control circuit that is connected between a gate of the power device and a ground line, and controls a slew rate during discharge. The slew rate control circuit includes a capacitor and a third semiconductor switch connected in series. The third semiconductor switch is brought into conduction according to the second control signal.

According to one embodiment, electronic circuitry includes a semiconductor switching element; and a driving circuit configured to supply a current to a control terminal of the semiconductor switching element and to adjust a magnitude of the current supplied to the control terminal based on a voltage at the control terminal.

A switch circuit includes: a plurality of semiconductor elements (10) connected in series to each other; capacitive elements connected to at least some semiconductor elements (10) among the plurality of semiconductor elements (10); and a resistance element (30) connected between the capacitive elements.

A method of controlling a half-bridge circuit includes receiving an analog feedback signal proportional to an output of the half-bridge circuit, comparing the received analog feedback signal with a threshold value, selecting a digital feedback signal based on a result of the comparing, comparing the digital feedback signal with a digital reference signal to generate a digital error signal, integrating the digital error signal to generate an integration error signal, downscaling the integral error signal to generate a downscaled integration signal, sampling the downscaled integration signal to generate a sampled integration signal, and generating pulsed signals from the sampled integration signal to provide an input to the half-bridge circuit.

A device includes a first switch and a first diode connected in parallel between a midpoint and a first terminal of the hybrid power device, a second switch and a second diode connected in parallel between the midpoint and a second terminal of the hybrid power device, a third switch coupled between the first terminal and the second terminal, and a third diode connected between the first terminal and the second terminal.

A driver circuit for switching edge modulation of a power switch. The driver circuit includes a first driver circuit input including a downstream input node, and a power switch including an upstream first gate node. A charging path including a charging resistor is situated between the input node and the first gate node. A discharging path including a discharging resistor is situated between the input node and the first gate node. A gate path is situated between the input node and the first gate node. A power switch transistor, whose gate is connected to the first gate node, is provided. A gate path includes a gate resistor. The driver circuit is configured so that, during a switching process of the power switch, the gate path is temporarily short-circuited either via the charging path or the discharging path, to increase the slope of the switching behavior of the power switch.

An electronic circuit for uniform distribution of a current includes: a first MOSFET and a second MOSFET, wherein the first MOSFET and the second MOSFET are connected in parallel in order to distribute a current applied to an input terminal, the current flowing towards an output terminal of the electronic circuit, wherein the input terminal is respectively connected to a drain terminal of the first MOSFET and to a drain terminal of the second MOSFET; and a terminal for a control voltage, wherein the control voltage is applied to a gate terminal of the first MOSFET and to a gate terminal of the second MOSFET. The first MOSFET comprises a first resistor at the gate terminal of the first MOSFET, and the second MOSFET comprises a second resistor at the gate terminal of the second MOSFET.