A circuit includes a voltage source, a transistor, a load current sensor, a hardware latch and a logic circuit. The transistor is connected between the voltage source and a load. The sensor emits a fault signal when the load current exceeds a predetermined value. The hardware latch sets a latch signal when it receives the fault signal and maintains the latch signal until it receives a rearm signal. The logic circuit receives the latch signal from the hardware latch and also receives a software command for controlling turning on and off of the circuit. When the latch signal is not set, the logic circuit converts the software command to a control voltage applied at a gate of the transistor, turning on the transistor to allow power delivery to the load. A system includes a microcontroller providing software commands and rearm signals to a plurality of circuits.

A chip configured with pin-strapping includes a configuration pin coupled to a resistor, the resistor coupled a configuration circuit configured to provide a threshold voltage at a sense time interval. A configuration vector may be determined by driving the configuration pin with high impedance, and sampling the configuration pin at sense time intervals such that the configuration vector corresponds to the time interval at which a threshold voltage is reached.

An integrated circuit controls one or more external back-to-back (anti-series) transistor switches with three pins per switch. Two pins couple the switch terminals of the external switch to terminals of an internal anti-series switch. An intermediate source node of the internal switch provides a reference voltage that is representative of the external switch's intermediate source node. A predriver of the integrated circuit drives a gate signal relative to the reference voltage, enabling fast, non-dissipative switching of the external switch. A disclosed method includes coupling switch terminal signals from an external anti-series switch to terminals of an internal anti-series switch; and driving a gate signal to the external anti-series switch relative to a reference voltage of an intermediate node of the internal anti-series switch.

The present invention provides an integrated circuit with a multiplexed pin and a pin multiplexing method. The multiplexed pin of the integrated circuit extends out with two connecting ends to receive two logic level signals which are finally restored in a chip. A first signal input end receives a signal representing whether to enable or disable, a second signal input end receives a function signal which achieves a certain function, and a diode, a resistor, and a first current source are used together to achieve multiplexing of the pin based on turn-on and clamping characteristics of the diode. The number of pins to be packaged and the area occupied by a chip on board are reduced, which is conducive to a small package design of the chip.

A power converter includes a semiconductor element disposed on a substrate, a thermistor element for detecting the temperature of the substrate, the thermistor element being disposed on the substrate, a current detection resistor having one end connected to a ground side node and another end that is grounded, a first voltage detection unit configured to detect a first potential at the other end of the current detection resistor and a second potential at the ground side node, and output a first detection signal, a control unit configured to control the semiconductor element based on the first detection signal, a temperature detection resistor having one end that is connected to a reference potential and another end that is connected to a detection node, and a temperature detection unit configured to detect a temperature based on a third potential at the detection node, and output a temperature information signal.

A circuit structure for realizing circuit pin multiplexing, comprising an MCU module, a temperature sensing circuit and a functional module circuit. The output end of the temperature sensing circuit is connected with an enable signal interface of the MCU module, the output voltage of the temperature sensing circuit is always higher than the threshold voltage of the enable signal, and the MCU module is connected with the functional module circuit. The circuit structure of the present invention realizes the mutual influence of analog signal output and digital signal transmission by designing a temperature sensing output curve, and achieves multi-function multiplexing of a single pin, so that the output of the analog signal and the input of the digital signal can share the pins, it solves the problem of the limitation of the number of pins, and promotes the transmission of the signal and improves the cost performance of the circuit.

Various structures and methods are disclosed related to routing and programming circuitry on integrated circuits (IC) that have arrays of programmable resistive switches. In some embodiments, routing structures utilize densely populated resistive switch arrays to provide for efficient selection circuits that route into and out of logic regions. In other embodiments, programming circuitry is provided to help maintain relatively consistent programming current throughout an array of resistive switches to be programmed. In other embodiments, methods are provided for programming resistive switches without violating given power constraints. These and other embodiments are described further herein.

A system on chip (SoC) is connected to multiple off-chip devices, where the off-chip devices share IO pads of the SoC. A pin-mux circuit is used to facilitate the IO pad sharing. The pin-mux circuit can be addressed using just one control register and a decoder, which allows the IO pads to be easily and flexibly assigned. The decoder generates pin-mux control bits based on a configuration word stored in the control register. The pin-mux circuit assigns IO pads of the SoC to the off-chip devices. Device controllers of the SoC provide output bits to corresponding ones of the devices by way of the IO pads, and the devices provide input bits to the device controllers via the IO pads. Chip area is saved by using a register-decoder scheme, and set-up requires writing just the one control register.

The present invention provides an integrated circuit with a multiplexed pin and a pin multiplexing method. The multiplexed pin of the integrated circuit extends out with two connecting ends to receive two logic level signals which are finally restored in a chip. A first signal input end receives a signal representing whether to enable or disable, a second signal input end receives a function signal which achieves a certain function, and a diode, a resistor, and a first current source are used together to achieve multiplexing of the pin based on turn-on and clamping characteristics of the diode. The number of pins to be packaged and the area occupied by a chip on board are reduced, which is conducive to a small package design of the chip.

An embedded device has a plurality of processor cores, each with a plurality of peripheral devices, wherein each peripheral device has an output. Furthermore, a housing with a plurality of assignable external pins and a protected pin ownership logic for each assignable external pin is provided and configured to be programmable to assign an output function of an associated assignable external pin to only one of the plurality of processor cores.