A buffer system may have an output for driving a switched load that changes during periods indicated by a switching signal. The buffer system may operate in a closed loop when the switching signal indicates that a load change is not taking place by comparing a signal indicative of the output of the buffer system with a reference voltage. The buffer system may operate in an open loop when the switching signal indicates that a load change is taking place by not comparing signal indicative of the output of the buffer system with the reference voltage. Both the buffer system and the switched load may be on the same chip.

A buffer system may have an output for driving a switched load that changes during periods indicated by a switching signal. The buffer system may operate in a closed loop when the switching signal indicates that a load change is not taking place by comparing a signal indicative of the output of the buffer system with a reference voltage. The buffer system may operate in an open loop when the switching signal indicates that a load change is taking place by not comparing signal indicative of the output of the buffer system with the reference voltage. Both the buffer system and the switched load may be on the same chip.

An integrated circuit may include path delay calibration circuitry. The calibration circuitry may be configured to calibrate respective delay paths so that data and control signals travelling through the respective delay paths experience proper propagation delays during normal user operation. The calibration circuitry may include a high frequency error calibration circuit, a monitoring circuit, and a calibration processing circuit. The high frequency error calibration circuit may be used to compute first calibration settings that take into account jitter and process variations. The monitoring circuit may be used to measure a proxy parameter of interest. The processing circuit may be used to compute an offset based at least partly on the measured value of the proxy parameter. The offset may be applied to the first calibration settings to obtain second calibration settings, which can be used to configure the respective delay paths.