Programming time delay data in an oversampled sensor includes determining whether to enter Programming Mode based on a value of a system parameter received by the oversampled sensor. Programming Mode is entered when the value of the system parameter corresponds to Programming Mode. The time delay data is programmed in the oversampled sensor during Programming Mode. The oversampled sensor uses the time delay data to time delay its output in an oversampled domain. Programming Mode is exited after a predetermined time has expired relative to when Programming Mode was entered. The system parameter can be a frequency of a sampling clock signal.

An apparatus to time delay a digital, signal output from an oversampled sensor includes a first time delay element and a second time delay element. The first time delay element has a first input and a first output. The first time delay element is configured to output a time delayed signal that is time delayed by an integer number of sampling clock cycles. An output of the oversampled sensor is connected to the first input of the first time delay element. The second time delay element has a second input and a second output and is configured to output a time delayed signal that is time delayed by an integer number of sampling clock cycles. The first output of the first time delay element is connected to the second input of the second time delay element. A multiplexer has a control input and a multiplexer output. The first output of the first time delay element is connected to a first multiplexer input. The second output of the second time delay element is connected to a second multiplexer input. In operation, time delay information is used to provide a signal to the control input to select a particular multiplexer input for output on the multiplexer output. The output of the oversampled sensor is time delayed by an amount provided by the particular multiplexer input.

A measurement system is described, comprising a sampling clock unit, a travelling wave sampler circuit and at least a first analog-to-digital converter and a second analog-to-digital converter. The sampling clock unit is configured to generate a sampling timing for the travelling wave sampler circuit. The travelling wave sampler circuit is configured to receive an input signal. The travelling wave sampler circuit is further configured to provide at least a first time-discrete intermediate signal and a second time-discrete intermediate signal and to sample the first and the second time-discrete intermediate signal with the same sampling timing. The first analog-to-digital converter and the second analog-to-digital converter are configured to receive the first time-discrete intermediate signal sampled and the second time-discrete intermediate signal sampled, respectively. The first analog-to-digital converter and the second analog-to-digital converter are configured to output a first digitized output signal and a second digitized output signal, respectively. Further, a method for operating a measurement system is described.

An integrated circuit device includes dispatcher circuitry that receives signals from a first number of sources, multiplexes the signals into a single mixed signal in a predetermined order, and transmits the mixed signal to a destination via a mixed signal interface having an arbitrary length and operating at an interface clock frequency equal to a product of a device clock frequency and the first number. A second number of samplers is disposed in series along the mixed signal interface, outputting a sampled mixed signal synchronized to the interface clock. A chain of tracking elements in series, corresponding in number to the second number, outputs a tracking indication separate from the sampled mixed signal. Capture circuitry demultiplexes the sampled mixed signal into a plurality of demultiplexed signals, according to a starting point based on the tracking indication, onto a plurality of signal buses corresponding in number to the first number.

A measurement system is described, comprising a sampling clock unit, a travelling wave sampler circuit and at least a first analog-to-digital converter and a second analog-to-digital converter. The sampling clock unit is configured to generate a sampling timing for the travelling wave sampler circuit. The travelling wave sampler circuit is configured to receive an input signal. The travelling wave sampler circuit is further configured to provide at least a first time-discrete intermediate signal and a second time-discrete intermediate signal and to sample the first and the second time-discrete intermediate signal with the same sampling timing. The first analog-to-digital converter and the second analog-to-digital converter are configured to receive the first time-discrete intermediate signal sampled and the second time-discrete intermediate signal sampled, respectively. The first analog-to-digital converter and the second analog-to-digital converter are configured to output a first digitized output signal and a second digitized output signal, respectively. Further, a method for operating a measurement system is described.

An apparatus to time delay a digital, signal output from an oversampled sensor includes a first time delay element and a second time delay element. The first time delay element has a first input and a first output. The first time delay element is configured to output a time delayed signal that is time delayed by an integer number of sampling clock cycles. An output of the oversampled sensor is connected to the first input of the first time delay element. The second time delay element has a second input and a second output and is configured to output a time delayed signal that is time delayed by an integer number of sampling clock cycles. The first output of the first time delay element is connected to the second input of the second time delay element. A multiplexer has a control input and a multiplexer output. The first output of the first time delay element is connected to a first multiplexer input. The second output of the second time delay element is connected to a second multiplexer input. In operation, time delay information is used to provide a signal to the control input to select a particular multiplexer input for output on the multiplexer output. The output of the oversampled sensor is time delayed by an amount provided by the particular multiplexer input.

Programming time delay data in an oversampled sensor includes determining whether to enter Programming Mode based on a value of a system parameter received by the oversampled sensor. Programming Mode is entered when the value of the system parameter corresponds to Programming Mode. The time delay data is programmed in the oversampled sensor during Programming Mode. The oversampled sensor uses the time delay data to time delay its output in an oversampled domain. Programming Mode is exited after a predetermined time has expired relative to when Programming Mode was entered. The system parameter can be a frequency of a sampling clock signal.