Described is an integrated circuit with a driving amplifier that transmits a signal over a link (e.g. a wire) by raising and lowering a voltage on the link. A reference oscillator provides an error measure for the rate at which the voltage transitions between voltages, the slew rate. Slew-rate calibration circuitry adjusts the driving amplifier responsive to the error measure.

Described is an integrated circuit with a driving amplifier that transmits a signal over a link (e.g. a wire) by raising and lowering a voltage on the link. A reference oscillator provides an error measure for the rate at which the voltage transitions between voltages, the slew rate. Slew-rate calibration circuitry adjusts the driving amplifier responsive to the error measure.

Disclosed is an entropy generation apparatus, which includes a detector that detects particles emitted from the radiation source to generate a detection signal; a preamplifier that amplifies the detection signal to generate an amplified signal; a filter that filters the amplified signal to generate a filtered signal; and a comparator that generates a pulse based on a result of comparing the filtered signal with a threshold value.

Disclosed is an entropy generation apparatus, which includes a detector that detects particles emitted from the radiation source to generate a detection signal; a preamplifier that amplifies the detection signal to generate an amplified signal; a filter that filters the amplified signal to generate a filtered signal; and a comparator that generates a pulse based on a result of comparing the filtered signal with a threshold value.

A voltage converter system includes a switch configured to switch between first and second states responsive to a first control signal. Timer circuitry is configured to generate a timing signal representing a duration of the first state based on input and output voltages of the voltage converter system. Control logic is coupled to the switch and the timer circuitry, and configured to generate the first control signal based on a second control signal. The second control signal is based on a feedback voltage and a reference voltage. Timer control circuitry is coupled to the control logic and the timer circuitry, and configured to: detect a phase difference between the first control signal and the second control signal; and adjust the timer circuitry to change the duration based on the phase difference.

A voltage converter system includes a switch configured to switch between first and second states responsive to a first control signal. Timer circuitry is configured to generate a timing signal representing a duration of the first state based on input and output voltages of the voltage converter system. Control logic is coupled to the switch and the timer circuitry, and configured to generate the first control signal based on a second control signal. The second control signal is based on a feedback voltage and a reference voltage. Timer control circuitry is coupled to the control logic and the timer circuitry, and configured to: detect a phase difference between the first control signal and the second control signal; and adjust the timer circuitry to change the duration based on the phase difference.

The present invention provides an oscillator circuit and a semiconductor integrated circuit, which can suppress the upper limit of the frequency of a clock signal due to an error of the constant current circuit. The oscillator circuit of the present invention includes a constant current circuit, an oscillator, and a current limiting circuit. The constant current circuit generates a first output current according to a supply voltage. The current limiting circuit receives the first output current and generates a second output current, and establishes an upper limit for the second output current when the supply voltage drops below a lower limit of a guaranteed operational range of the constant current circuit. The oscillator generates a clock signal according to the second output current. By establishing the upper limit for the second output current, the upper limit of the frequency of the clock signal can be suppressed.

The present invention provides an oscillator circuit and a semiconductor integrated circuit, which can suppress the upper limit of the frequency of a clock signal due to an error of the constant current circuit. The oscillator circuit of the present invention includes a constant current circuit, an oscillator, and a current limiting circuit. The constant current circuit generates a first output current according to a supply voltage. The current limiting circuit receives the first output current and generates a second output current, and establishes an upper limit for the second output current when the supply voltage drops below a lower limit of a guaranteed operational range of the constant current circuit. The oscillator generates a clock signal according to the second output current. By establishing the upper limit for the second output current, the upper limit of the frequency of the clock signal can be suppressed.

The present invention provides an oscillator circuit and a semiconductor integrated circuit, which can suppress the upper limit of the frequency of a clock signal due to an error of the constant current circuit. The oscillator circuit of the present invention includes a constant current circuit, an oscillator, and a current limiting circuit. The constant current circuit generates a first output current according to a supply voltage. The current limiting circuit receives the first output current and generates a second output current, and establishes an upper limit for the second output current when the supply voltage drops below a lower limit of a guaranteed operational range of the constant current circuit. The oscillator generates a clock signal according to the second output current. By establishing the upper limit for the second output current, the upper limit of the frequency of the clock signal can be suppressed.

Systems and methods disclosed herein may be useful for use in landing identification. In this regard, a method is provided comprising receiving pulse information over a first time period, wherein the pulse information is indicative of an angular distance traveled by a first wheel, comparing the pulse information to a threshold value, and determining a likelihood of a landing event based upon the comparison. In various embodiments, a system is provided comprising a monstable multivibrator in electrical communication with a metal-oxide-semiconductor field-effect transistor (MOSFET), a resistor-capacitor network in electrical communication with the MOSFET, and a comparator that receives a voltage from the resistor-capacitor network and a reference voltage.