H03K5/2472

SEMICONDUCTOR DEVICE

According to one embodiment, a semiconductor device includes a first switch element including a first end to which a first voltage is applied, and a second end and a gate electrically coupled to a first node, a second switch element including a first end to which a second voltage is applied, and a second end and a gate electrically coupled to the first node, a third switch element including a first end to which the second voltage is applied, a second end electrically coupled to a second node, and a gate coupled to the first node, a fourth switch element including a gate coupled to the second node, and a first terminal electrically coupled to a first end of the fourth switch element and outputting a signal based on a voltage of the second node.

PREPROCESSING CIRCUIT FOR COMPARATORS AND PREPROCESSING METHOD THEREOF
20230216415 · 2023-07-06 ·

A preprocessing circuit for a comparator has a high voltage selection circuit, a first constant voltage circuit, a second constant voltage circuit, a first transistor, and a second transistor. The high voltage selection circuit receives a first voltage and a second voltage, and provides a selected voltage. The first constant voltage circuit provides a first clamping voltage based on the selected voltage, and the second constant voltage circuit provides a second clamping voltage based on the selected voltage. The first transistor receives the first voltage and the first clamping voltage, and provides a first comparison voltage to a first comparison terminal of the comparator. The second transistor receives the second voltage and the second clamping voltage, and provides a second comparison voltage to a second comparison terminal of the comparator.

Voltage comparator

In an embodiment, a voltage comparator includes: a first switch having a conduction terminal coupled to an internal node that is coupled to an output of the voltage comparator; a current source; a capacitor; and a second switch connected in parallel with the capacitor, wherein the current source, the capacitor, and the first switch are coupled in series.

Apparatus and methods for sensing resonant circuit signals to enhance control in a resonant converter

Apparatus and methods for sensing resonant circuit signals to enhance control in a resonant converter are described herein. A buffer circuit coupled in parallel with or across a resonant component (e.g., a transformer) input port avails a buffered primary port signal for use in resonant conversion. The buffered primary port signal is a comprehensive signal including information relating to both input voltage and input power; and it may be used to advantageously enhance switching and power conversion in an inductor-inductor capacitor (LLC) converter. Additionally, the LLC converter uses a sense interface circuit to provide a scaled replica of the buffered primary port signal. In one example the scaled replica can advantageously be used with a secondary side controller to control output power based on the comprehensive information contained within the buffered primary port signal.

SYSTEM, METHOD, AND COMPUTER DEVICE FOR TRANSISTOR-BASED NEURAL NETWORKS
20220374698 · 2022-11-24 ·

Provided are computer systems, methods, and devices for operating an artificial neural network. The system includes neurons. The neurons include a plurality of synapses including charge-trapped transistors for processing input signals, an accumulation block for receiving drain currents from the plurality of synapses, the drain currents produced as an output of multiplication from the plurality of synapses, the drain currents calculating an amount of voltage multiplied by time, a capacitor for accumulating charge from the drain currents to act as short-term memory for accumulated signals, a discharge pulse generator for generating an output signal by discharging the accumulated charge during a discharging cycle, and a comparator for comparing an input voltage with a reference voltage. The comparator produces a first output if the input voltage is above the reference voltage and produces a second output if the input voltage is below the reference voltage.

Method of formulating perovskite solar cell materials

A method for preparing photoactive perovskite materials. The method comprises the step of preparing a germanium halide precursor ink. Preparing a germanium halide precursor ink comprises the steps of: introducing a germanium halide into a vessel, introducing a first solvent to the vessel, and contacting the germanium halide with the first solvent to dissolve the germanium halide. The method further comprises depositing the germanium halide precursor ink onto a substrate, drying the germanium halide precursor ink to form a thin film, annealing the thin film, and rinsing the thin film with a second solvent and a salt.

Isolated Universal Serial Bus Repeater with High Speed Capability

An isolating repeater and corresponding method for Universal Serial Bus (USB) communications. The isolating repeater includes, on either side of a galvanic isolation barrier, front end circuitry coupled to a pair of external terminals, a full speed (FS) transceiver adapted to drive and receive signals over one or more FS isolation channels, and a high speed (HS) transceiver adapted to drive signals over a one HS isolation channel and receive signals over another HS isolation channel. The front end circuitry encodes received signals corresponding to HS data into two-state signals for transmission over one HS isolation channel, and encodes received signals corresponding to HS signaling into two-state signals for transmission over one or more of the FS isolation channels. The front end circuitry on the other side of the isolation barrier decodes the two-state signals received over the one or more FS isolation channels and the two-state signals received over the HS isolation channel for transmission at its external terminals.

System, method, and computer device for transistor-based neural networks
11636326 · 2023-04-25 · ·

Provided are computer systems, methods, and devices for operating an artificial neural network. The system includes neurons. The neurons include a plurality of synapses including charge-trapped transistors for processing input signals, an accumulation block for receiving drain currents from the plurality of synapses, the drain currents produced as an output of multiplication from the plurality of synapses, the drain currents calculating an amount of voltage multiplied by time, a capacitor for accumulating charge from the drain currents to act as short-term memory for accumulated signals, a discharge pulse generator for generating an output signal by discharging the accumulated charge during a discharging cycle, and a comparator for comparing an input voltage with a reference voltage. The comparator produces a first output if the input voltage is above the reference voltage and produces a second output if the input voltage is below the reference voltage.

Method for data storage and comparison, storage comparison circuit device, and semiconductor memory
11632100 · 2023-04-18 · ·

Embodiments provide a method for data storage and comparison, a storage comparison circuit device, and a semiconductor memory. The storage comparison circuit device includes a latch and a comparator. The latch is configured to latch inputted first input data and output first output data and second output data. The first output data are the same as the first input data, whereas the second output data are different from the first input data, wherein the first output data and the second output data are respectively inputted into the comparator. The comparator is configured to receive second input data, the first output data and the second output data, and to output a comparison result. By using modular structures of the latch and the comparator, device data can be simplified for the latch and the comparator, chip area can be reduced, calculation amount can be reduced, and efficiency of data comparison can be improved.

Semiconductor device

According to one embodiment, a semiconductor device includes a first switch element including a first end to which a first voltage is applied, and a second end and a gate electrically coupled to a first node, a second switch element including a first end to which a second voltage is applied, and a second end and a gate electrically coupled to the first node, a third switch element including a first end to which the second voltage is applied, a second end electrically coupled to a second node, and a gate coupled to the first node, a fourth switch element including a gate coupled to the second node, and a first terminal electrically coupled to a first end of the fourth switch element and outputting a signal based on a voltage of the second node.