Aspects of the disclosure are directed to compensating for errors in in an analog-to-digital converter circuit (ADC). As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves an ADC that converts an analog signal into a digital signal using an output from a digital-to-analog converter circuit (DAC). A compensation circuit generates a compensation output by, for respective signal portions provided to the DAC, generating a feedback signal based on an incompatibility between the conversion of the signal portions into an analog signal and the value of the signal portions provided to the DAC. A compensation output is generated based on the signal input to the DAC with a gain applied thereto, based on the feedback signal. Hereby, the digital inputs provided to the DACs are non-randomized.

Apparatus includes an ADC configured to convert an analog signal to a digital signal, a comparator having a first input responsive to the analog signal, a second input responsive to the digital signal, and an output at which a comparison signal is provided, and an output checker configured to process the comparison signal to generate a fault signal indicative of whether a fault has occurred in the ADC. The comparator can be an analog comparator in which case the digital signal is converted to an analog signal for the comparison or a digital comparator in which case an additional ADC is provided to convert the analog signal into a digital signal for the comparison. Embodiments include more than one ADC in which case summation elements are provided to sum the analog signals and the digital signals for the comparison.

A pipeline analog to digital converter (ADC) includes converter circuitries, a detector circuitry, and a clock generator circuit. The converter circuitries sequentially convert an input signal to be digital codes. One of the converter circuitries includes a sub-ADC circuit and a multiplying digital to analog converter (MDAC) circuit. The sub-ADC circuit performs a quantization according to a first signal to generate a corresponding one of the digital codes, in which the first signal is the input signal or a previous stage residue signal. The MDAC circuit processes the corresponding one of the digital codes in response to a first clock signal, in order to generate a current stage residue signal. The detector circuitry detects whether the quantization is complete, in order to generate a control signal. The clock generator circuit adjusts a timing of the first clock signal according to the control signal.

A device is provided comprising a first oscillator based analog-to-digital converter configured to receive an analog input signal and output a first digital signal and a second oscillator based analog-to-digital converter configured to receive an analog reference signal and output a second digital signal. The device further comprises output logic configured to generate a digital output signal based on the first digital signal and the second digital signal.

A pipeline analog to digital converter (ADC) includes converter circuitries, a detector circuitry, and a clock generator circuit. The converter circuitries sequentially convert an input signal to be digital codes. One of the converter circuitries includes a sub-ADC circuit and a multiplying digital to analog converter (MDAC) circuit. The sub-ADC circuit performs a quantization according to a first signal to generate a corresponding one of the digital codes, in which the first signal is the input signal or a previous stage residue signal. The MDAC circuit processes the corresponding one of the digital codes in response to a first clock signal, in order to generate a current stage residue signal. The detector circuitry detects whether the quantization is complete, in order to generate a control signal. The clock generator circuit adjusts a timing of the first clock signal according to the control signal.

A device is provided comprising a first oscillator based analog-to-digital converter configured to receive an analog input signal and output a first digital signal and a second oscillator based analog-to-digital converter configured to receive an analog reference signal and output a second digital signal. The device further comprises output logic configured to generate a digital output signal based on the first digital signal and the second digital signal.

Apparatus includes an ADC configured to convert an analog signal to a digital signal, a comparator having a first input responsive to the analog signal, a second input responsive to the digital signal, and an output at which a comparison signal is provided, and an output checker configured to process the comparison signal to generate a fault signal indicative of whether a fault has occurred in the ADC. The comparator can be an analog comparator in which case the digital signal is converted to an analog signal for the comparison or a digital comparator in which case an additional ADC is provided to convert the analog signal into a digital signal for the comparison. Embodiments include more than one ADC in which case summation elements are provided to sum the analog signals and the digital signals for the comparison.

Techniques for improving a power supply accuracy of a precision data converter system, such as analog-to-digital converter circuits (ADCs) and digital-to-analog converter circuits (DACs). Improving the power supply accuracy can enable a reference voltage to be as large as possible, thereby increasing the signal-to-noise-ratio (SNR). The techniques can also simplify power supply sequencing requirements for the data converter system.

Techniques for improving a power supply accuracy of a precision data converter system, such as analog-to-digital converter circuits (ADCs) and digital-to-analog converter circuits (DACs). Improving the power supply accuracy can enable a reference voltage to be as large as possible, thereby increasing the signal-to-noise-ratio (SNR). The techniques can also simplify power supply sequencing requirements for the data converter system.

A method and a circuit for measuring an absolute voltage signal, such that the circuit comprises: an A/D convertor, and a controller adapted for: a) obtaining a first digital reference value for a first reference signal having a positive temperature coefficient; b) obtaining a second digital reference value for a second reference signal having a negative temperature coefficient; c) obtaining a raw digital signal value for the signal to be measured, while applying a same reference voltage for step a) to c); and d) calculating the absolute voltage value in the digital domain using a mathematical function of the first and second digital reference value, and the raw digital signal value.