Patent classifications
H03M1/108
Imaging system and imaging device
An imaging system according to the present disclosure includes: an imaging device that is mounted in a vehicle, and captures and generates an image of a peripheral region of the vehicle; and a processing device that is mounted in the vehicle, and executes processing related to a function of controlling the vehicle on the basis of the image. The imaging device includes: a first control line, a first voltage generator that applies a first voltage to the first control line, a first signal line, a plurality of pixels that applies a pixel voltage to the first signal line, a first dummy pixel that applies a voltage corresponding to the first voltage of the first control line to the first signal line in a first period, a converter including a first converter that performs AD conversion on the basis of a voltage of the first signal line in the first period to generate a first digital code, and a diagnosis section that performs diagnosis processing on the basis of the first digital code. The above-described processing device restricts the function of controlling the vehicle on the basis of a result of the diagnosis processing.
Built-in-self-test circuit for sigma-delta modulator
A built-in-self-test (BIST) circuit is connected to a processor and a sigma-delta modulator (SDM) and includes an averaging circuit, a reference signal generator, and a comparator. The averaging circuit calculates an average of a sum of a set of bit signals of the SDM output signal over a period of time period, and generates an average SDM signal. The reference signal generator generates a reference SDM signal based on an SDM input signal. The comparator compares the voltage levels of the average SDM and reference SDM signals with a threshold value, and generates a test output signal based on the comparison.
BUILT-IN SELF-TEST CIRCUITS AND SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING THE SAME
A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.
DFT ARCHITECTURE FOR ANALOG CIRCUITS
An integrated circuit (IC) includes: a first functional analog pin or pad; a first analog test bus coupled to the first functional analog pin or pad; first and second analog circuits coupled to the first analog test bus; and a test controller configured to: when the IC is in a functional operating mode, connect an input or output of the first analog circuit to the first analog test bus so that the input or output of the first analog circuit is accessible by the first functional analog pin or pad, and keep disconnected an input or output of the second analog circuit from the first analog test bus, and when the IC is in a test mode, selectively connect the input or output of the first and second analog circuits to the first analog test bus to test the first and second analog circuits using the first analog test bus.
Testing device and testing method for testing a device under test
A testing device and a method for testing a device under test are provided. The testing device comprises at least two signal generators, at least two numerically controlled oscillators, at least two white gaussian noise generators, at least two digital filters, each of which comprising a respective transfer function H.sub.i, at least two adders, at least two digital-to-analog converters, and an analog processor.
Built-in harmonic prediction method for embedded segmented-data-converters and system thereof
The inventive concept relates to a method and system for cost-effectively predicting the dynamic nonlinearities of on-chip segmented digital-to-analog converter (DAC) and analog-to-digital-converter (ADC), by looping a DAC to an ADC, using a programmable-gain-amplifier (PGA) and an external load board. The method may include a first loopback step of supplying an output signal from a coarse DAC, to which a sinusoidal signal is supplied, to a coarse ADC and a fine ADC through an external load board, a second loopback step of supplying an output signal from a fine DAC, to which a sinusoidal signal is supplied, to the fine ADC and the coarse ADC through the load board, and a step of predicting dynamic nonlinearity of each of a DAC and an ADC by processing equations exhibiting dynamic nonlinearity of a sub-DAC and a sub-ADC, which are obtained in the first loopback step and the second loopback step.
Circuit arrangement comprising a microprocessor and a voltage generating circuit
A circuit arrangement includes a microcontroller having a first analog-to-digital converter whose input is connected to the output of a first multiplexer whose output is connected to a first comparison device for comparing reference voltages, and a first serial interface circuit connected to the first comparison device. A voltage generating circuit includes a second analog-to-digital converter whose input is connected to the output of a second multiplexer whose output is connected to a number of registers, which are connected to a safety value generator and store digital values together with a respective safety value, and a second serial interface circuit connected to the registers. The first and second serial interface circuits are connected to each other for communication of the microcontroller with the voltage generating circuit, the first interface circuit being connected to a second comparison device for comparing supply voltages and/or currents with desired voltages and/or desired currents.
IMAGING SYSTEM AND IMAGING DEVICE
An imaging system according to the present disclosure includes: an imaging device that is mounted in a vehicle, and captures and generates an image of a peripheral region of the vehicle; and a processing device that is mounted in the vehicle, and executes processing related to a function of controlling the vehicle on the basis of the image. The imaging device includes: a first control line, a first voltage generator that applies a first voltage to the first control line, a first signal line, a plurality of pixels that applies a pixel voltage to the first signal line, a first dummy pixel that applies a voltage corresponding to the first voltage of the first control line to the first signal line in a first period, a converter including a first converter that performs AD conversion on the basis of a voltage of the first signal line in the first period to generate a first digital code, and a diagnosis section that performs diagnosis processing on the basis of the first digital code. The above-described processing device restricts the function of controlling the vehicle on the basis of a result of the diagnosis processing.
CIRCUIT ARRANGEMENT COMPRISING A MICROPROCESSOR AND A VOLTAGE GENERATING CIRCUIT
A circuit arrangement includes a microcontroller having a first analog-to-digital converter whose input is connected to the output of a first multiplexer whose output is connected to a first comparison device for comparing reference voltages, and a first serial interface circuit connected to the first comparison device. A voltage generating circuit includes a second analog-to-digital converter whose input is connected to the output of a second multiplexer whose output is connected to a number of registers, which are connected to a safety value generator and store digital values together with a respective safety value, and a second serial interface circuit connected to the registers. The first and second serial interface circuits are connected to each other for communication of the microcontroller with the voltage generating circuit, the first interface circuit being connected to a second comparison device for comparing supply voltages and/or currents with desired voltages and/or desired currents.
Method and system to enhance accuracy and resolution of system integrated scope using calibration data
This specification discloses methods and systems for implementing a chip integrated scope (i.e., chip scope (CS)), which is a feature that allows a user to scope RF signals (internally and externally to the DUT (device under test)), by using the RF receive path (including amplifier, filter, ADC, DSP) to capture and store signal traces. In some embodiments, this specification discloses methods and systems to enhance the resolution and accuracy of these signal traces by using raw and correction data for gain/phase compensation of gain/phase impairments introduced in the Rx (receiver) path. In some embodiments, the correction data is generated from one or more of the following: simulation data, characterization data, production test data.