A receiver can include a first set of one or more amplifier stages configured to amplify input signals in a plurality of communication bands. The receiver can further include a second and third set of one or more amplifier stages. The second set of one or more amplifier stages can be configured to selectively receive the input signals in the plurality of communication bands amplified by the first set of one or more amplifier stages and to amplify one or more input signals in a first one of the plurality of communication bands. Alternatively, the third set of one or more amplifier stages can be configured to selectively receive the input signals in the plurality of communication bands amplified by the first set of one or more amplifier stages and to amplify one or more input signals in a second one of the plurality of communication bands. A first set of one or more mixers can be configured to receive the input signals in the first communication band amplified by the second set of one or more amplifier stages, to receive one or more local oscillator signals for the first communication band, and to generate a baseband signal from a frequency difference of the signal of the first communication band and the one or more local oscillator signals for the first communication band. A second set of one or more mixers can be configured to receive the input signal in the second communication band amplified by the third set of one or more amplifier stages, to receive one or more local oscillator signals for the second communication band, and to generate a baseband signal of the second communication band.

A time-interleaved sampling system includes an input signal having a time-varying analog value and a plurality of samplers. Each sampler is operable in a hold mode and a track mode. In the track mode, the samplers track the analog value of the input signal. In the hold mode, each sampler holds a respective analog value of the input signal that a respective sampler tracked immediately before entering the hold mode. The samplers enter the track mode in a predetermined sequence. After a last sampler in the predetermined sequence enters the track mode, the predetermined sequence is repeated in a loop. At random intervals, a skipped sampler in the predetermined sequence is bypassed from entering the track mode.

The invention relates to an acquisition module for a monitoring system of a rotating machine, in particular of an aircraft engine, the acquisition module comprising at least one measurement sensor for measuring an analogue signal x(t) of a physical quantity of a member of the rotating machine, at least one sample-and-hold device configured to collect a sample of the analogue signal x(t) at sampling times t n and to maintain it constant between two sampling times t n, and at least one memory for storing samples, the sample-and-hold device being configured to collect a sample of the analogue signal x(t) at sampling times t n defined in a random manner, the sampling times t n being defined according to the following law t n=n t+ n, the samples and the sampling times t n being stored in the memory.

A circuit having an array of Analog-to-Digital Converters (ADCs); a sampling order selector configured to select a sampling order of the ADCs and output corresponding sampling order control words; sampling pulse generators coupled between the sampling order selector and the respective ADCs, and configured to output respective sampling pulses based on the respective sampling order control words, wherein the ADCs are configured to sample and convert analog data into digital data in response to the sampling pulses; and a single clock generator configured to distribute a delay-matched clock to each of the ADCs in parallel, to each of the sampling pulse generators in parallel, and to the sampling order selector.

Transit-time based ultrasonic flow meter with analog-to-digital conversion for measuring ultrasonic signals, wherein accuracy of measurements is improved by making several measurements with different input offset, reference voltage, frame offset or sample rate in an analog-to-digital conversion stage.

A digital equalizer with reduced number of multipliers for correction of the frequency responses of an interleaved analog-to-digital-converter (ADC) is disclosed. An exemplary interleaved analog to digital converter with digital equalization includes at least one composite ADC including M time-interleaved sub-ADCs, and an equalization configuration deploying a Pre-FIR transformers unit, a FIRs assembly unit, and a Post-FIR transformers unit. The FIRs assembly unit includes a finite impulse response (FIR) filter network which is operative pursuant to a Fast Filtering Algorithm as an alternative to a conventional finite impulse response network, enabling a reduction of the number of multipliers compared to conventional FIR filter-based equalization networks for ADCs.

Transit-time based ultrasonic flow meter with analog-to-digital conversion for measuring ultrasonic signals, wherein accuracy of measurements is improved by making several measurements with different input offset, reference voltage, frame offset or sample rate in an analog-to-digital conversion stage.

Sigma-delta converters having a sampling circuit are provided. The sampling circuit is actuated such that sampling times are at least partially random.

A receiver can include a first set of one or more amplifier stages configured to amplify input signals in a plurality of communication bands. The receiver can further include a second and third set of one or more amplifier stages. The second set of one or more amplifier stages can be configured to selectively receive the input signals in the plurality of communication bands amplified by the first set of one or more amplifier stages and to amplify one or more input signals in a first one of the plurality of communication bands. Alternatively, the third set of one or more amplifier stages can be configured to selectively receive the input signals in the plurality of communication bands amplified by the first set of one or more amplifier stages and to amplify one or more input signals in a second one of the plurality of communication bands. A first set of one or more mixers can be configured to receive the input signals in the first communication band amplified by the second set of one or more amplifier stages, to receive one or more local oscillator signals for the first communication band, and to generate a baseband signal from a frequency difference of the signal of the first communication band and the one or more local oscillator signals for the first communication band. A second set of one or more mixers can be configured to receive the input signal in the second communication band amplified by the third set of one or more amplifier stages, to receive one or more local oscillator signals for the second communication band, and to generate a baseband signal of the second communication band.

Sigma-delta converters having a sampling circuit are provided. The sampling circuit is actuated such that sampling times are at least partially random.