An apparatus comprises a sigma-delta analog-to-digital converter (ADC) circuit configured to convert an analog input signal to a digital value. The sigma-delta ADC circuit includes a loop filter circuit including at least one loop filter amplifier, a flash ADC circuit including multiple comparators, and a bias control circuit configured to change a biasing of the at least one loop filter amplifier according to outputs of the multiple comparators of the flash ADC circuit.

An apparatus and method for processing signals in the analog domain. A signal is derived from analog circuit properties that is shift and scale invariant. Although the circuit properties are not quantized as in traditional digital signal processing, the signal is immune from effects of the properties, such as common mode noise, absolute voltage or current level, finite settling time, etc., as a digital signal would be. The shift and scale invariance allows for mathematical operations of addition, subtraction, multiplication and division of signals. By combining these operations, various circuits may be constructed, including a voltage controlled amplifier, a time gain amplifier, and an analog-to-digital converter. The circuits are constructed using almost no non-linear, active devices, and will thus use less power for a given speed than comparable digital devices, and will often be faster as there are no delay elements and no need to wait for the circuit properties to settle.

An embodiment electronic circuit includes an electronic switch comprising a load path, a first protection circuit configured to generate a first protection signal based on a current-time-characteristic of a load current through the load path of the electronic switch, and a drive circuit configured to drive the electronic switch based on the first protection signal. The first protection circuit includes an analog-to-digital converter (ADC) configured to receive an ADC input signal representing the load current, to sample the ADC input signal once in each of a plurality of successive sampling periods, and to output an ADC output signal that includes a sequence of values such that each of the values represents a respective sample of the ADC input signal. The ADC is configured to pseudo-randomly select a sample time in each sampling period.

An embodiment electronic circuit includes an electronic switch comprising a load path, and a control circuit configured to drive the electronic switch. The control circuit is configured to operate in one of a first operation mode and a second operation mode based at least on a level of a load current of the electronic switch. In the first operation mode the control circuit is configured to generate a first protection signal based on a current-time-characteristic of the load current and drive the electronic switch based on the first protection signal. The control circuit is configured to generate a status signal such that the status signal has a wakeup pulse when the operation mode changes from the second operation mode to the first operation mode and, after the wakeup pulse, a signal level representing a level of the load current.

An embodiment electronic circuit includes an electronic switch comprising a load path, a first protection circuit configured to generate a first protection signal based on a current-time-characteristic of a load current through the load path of the electronic switch, and a drive circuit configured to drive the electronic switch based on the first protection signal. The first protection circuit includes a logarithmic analog-to-digital converter (ADC) configured to receive an ADC input signal representing the load current and to output an ADC output signal that includes a sequence of values such that each of the values represents a respective sample of the ADC input signal, a filter configured to filter the ADC output signal and output a filter output signal, and a comparator circuit configured to generate the first protection signal based on comparing the filter output signal with a predefined threshold.

A flash analog to digital converter includes a voltage generator circuit, an encoder circuit, and first and second double differential amplifier circuits. The voltage generator circuit generates reference voltages according to first and second voltages. The encoder circuit generates a digital signal corresponding to an input signal according to first signals. The first double differential amplifier circuit compares the input signal with a first reference voltage in the reference voltages, to generate a corresponding one of the first signals. The second double differential amplifier circuit compares the input signal with a second reference voltage in the reference voltages, to generate a corresponding one of the first signals. A difference between the first voltage and the first reference voltage is less than that between the first voltage and the second reference voltage, and the first and the second double differential amplifier circuits have different circuit architectures.

An analog-to-digital converter that converts an inputted analog signal into a digital value is disclosed that may include unit circuits that each generate reference voltages comprising regular potential intervals by a series resistor circuit connected between a high potential side reference voltage and a low potential side reference voltage and convert the reference voltages into a digital value by comparing the reference voltages with the inputted analog signal, and an adder that adds the digital values converted by the unit circuits. Each unit circuit may include coupling switches that couple the series resistor circuit with the series resistor circuit of another one of the unit circuits and connect the series resistor circuits between the high potential side reference voltage and the low potential side reference voltage and a sharing switch that shares the inputted analog signal with the other unit circuit that is coupled with the series resistor circuit.

The present invention provides a proximity sensing device, which comprises an ambient light calibration digital-to-analog converter and at least one crosstalk calibration digital-to-analog converters. The proximity sensing device is able to quickly generate calibration parameters for the interference caused by the ambient list and crosstalk caused by different reflection, to calibrate the sensed signals to avoid wrong judgments.

A receiver includes a variable resolution analog-to-digital converter (ADC) and variable resolution processing logic/circuitry. The processing logic may use feed-forward equalization (FFE) techniques to process the outputs from the ADC. When receiving data from a channel having low attenuation, distortion, and/or noise, the ADC and processing logic may be configured to sample and process the received signal using fewer bits, and therefore less logic, than when configured to receiving data from a channel having a higher attenuation, distortion, and/or noise. Thus, the number of (valid) bits output by the ADC, and subsequently processed (e.g., for FFE equalization) can be reduced when a receiver of this type is coupled to a low loss channel. These reductions can reduce power consumption when compared to operating the receiver using the full (i.e., maximum) number of bits the ADC and processing logic is capable of processing.

A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.