A radio frequency (RF) rake receiver may include a plurality of diversity receive paths, with each diversity receive path including a respective rake receiver despreader, and a tracking loop. The tracking loop may be configured to generate a composite timing signal based upon the rake receiver despreaders, and provide the composite timing signal to the diversity receive paths.

A method of operating a transmitter (FIGS. 3A and 5A) is disclosed. The method includes receiving a sequence of data bits (DATA), wherein each data bit has a respective sequence number. A first data bit of the sequence is spread (508) with a first spreading code (504) determined by the sequence number (502) of the first data bit. A second data bit of the sequence is spread (508) with an inverse of the first spreading code (506) determined by the sequence number (502) of the second data bit. The first and second data bits are modulated (510) and transmitted (516) to a remote receiver.

A method of operating a transmitter (FIGS. 3A and 5A) is disclosed. The method includes receiving a sequence of data bits (DATA), wherein each data bit has a respective sequence number. A first data bit of the sequence is spread (508) with a first spreading code (504) determined by the sequence number (502) of the first data bit. A second data bit of the sequence is spread (508) with an inverse of the first spreading code (506) determined by the sequence number (502) of the second data bit. The first and second data bits are modulated (510) and transmitted (516) to a remote receiver.

A source-synchronous clocking signal is sampled by an edge sampler triggered by a phase-adjusted version of the clocking signal. The output of the edge sampler is used as a phase-error indicator for a filtered feedback loop that aligns the phase-adjusted clocking signal to minimize, on average, the difference between the received source-synchronous clocking signal and the phase-adjusted version of the clocking signal minus the setup time of the sampler. This forms a delay-locked loop configuration. The phase adjustment information used to produce the aligned phase-adjusted clocking signal is then to produce a receiver clocking signal that is used to sample the source-synchronous data signal.

A source-synchronous clocking signal is sampled by an edge sampler triggered by a phase-adjusted version of the clocking signal. The output of the edge sampler is used as a phase-error indicator for a filtered feedback loop that aligns the phase-adjusted clocking signal to minimize, on average, the difference between the received source-synchronous clocking signal and the phase-adjusted version of the clocking signal minus the setup time of the sampler. This forms a delay-locked loop configuration. The phase adjustment information used to produce the aligned phase-adjusted clocking signal is then to produce a receiver clocking signal that is used to sample the source-synchronous data signal.

A method of generating a BOC correlation function based on partial correlation functions, an apparatus for tracking a BOC signal, and a spread spectrum signal receiver system using the same are disclosed herein. The apparatus includes a frequency offset compensation unit, a local code generation unit, a mixer, a delay lock loop (DLL), a phase lock loop (PLL), and a data extraction unit. The frequency offset compensation unit outputs a compensated received signal with respect to a received signal. The local code generation unit generates a delay-compensated local code based on a code delay value. The mixer mixes the delay-compensated local code with the frequency offset-compensated received signal. The DLL repeatedly tracks and calculates a code delay value. The PLL repeatedly calculates a carrier frequency compensation value. The data extraction unit extracts spreading data from a mixture of the delay-compensated local code and the compensated received signal.

A method of generating a BOC correlation function based on partial correlation functions, an apparatus for tracking a BOC signal, and a spread spectrum signal receiver system using the same are disclosed herein. The apparatus includes a frequency offset compensation unit, a local code generation unit, a mixer, a delay lock loop (DLL), a phase lock loop (PLL), and a data extraction unit. The frequency offset compensation unit outputs a compensated received signal with respect to a received signal. The local code generation unit generates a delay-compensated local code based on a code delay value. The mixer mixes the delay-compensated local code with the frequency offset-compensated received signal. The DLL repeatedly tracks and calculates a code delay value. The PLL repeatedly calculates a carrier frequency compensation value. The data extraction unit extracts spreading data from a mixture of the delay-compensated local code and the compensated received signal.

The present invention discloses methods of accuracy improving for code measurements in GLONASS GNSS receivers. One component of error budget in code measurements of GLONASS receivers is caused by a difference in signal delays arising in the receiver analog Front End and antenna filter on different channel frequencies specific to GLONASS satellites. Methods to compensate for differences in delays for different GLONASS channel frequencies have been proposed using data collected from a GLONASS signals simulator.

A GNSS (Global Navigation Satellite System) receiver apparatus includes a bank of correlators configured to receive in-phase and quadrature versions of a received signal. A code numerical controlled oscillator is configured to determine a code frequency. A GNSS pseudo random noise sequence generator is configured to generate a pseudo random noise sequence at the code frequency set by the code numerical controlled oscillator. A GNSS pseudo random noise delayed sequence generator includes a first shift register and a second shift register. Taps of the shift registers are selectable as a punctual replica, an early replica and a delayed replica of the pseudo random noise sequence. An enable circuit is configured to generate an enable signal coupled to an enable input of the flip-flops, the enable signal operating at a selectable enable frequency.

A code acquisition module for a direct sequence spread spectrum (DSSS) receiver includes: a Sparse Discrete Fourier transform (SDFT) module configured to perform an SDFT on a finite number of non-uniformly distributed frequencies comprising a preamble of a received DSSS frame to calculate Fourier coefficients for the finite number of non-uniformly distributed frequencies; a multiplier configured to multiply the Fourier coefficients for the finite number of non-uniformly distributed frequencies of the received DSSS frame by complex conjugate Fourier coefficients for the finite number of non-uniformly distributed frequencies to generate a cross-correlation of the received DSSS frame and the complex conjugate Fourier coefficients; and a filter module configured to input the cross-correlation and output a delay estimation for the received DSSS frame.