Patent classifications
H04L25/03261
Enhanced discrete-time feedforward equalizer
An N-tap feedforward equalizer (FFE) comprises a set of N FFE taps coupled together in parallel, a filter coupled between the (N−1)th FFE tap and the Nth FFE tap, and a summer coupled to an output of the set of N FFE taps. Each FFE tap includes a unique sample-an-hold (S/H) circuit that generates a unique time-delayed signal and a unique transconductance stage that generates a unique transconductance output based on the unique time-delayed signal. The filter causes the N-tap FFE to have the behavior of greater than N taps. In some examples, the filter is a first order high pass filter that causes coefficients greater than N to have an opposite polarity of the Nth coefficient. In some examples, the filter is a first order low pass filter that causes coefficients greater than N to have the same polarity as the Nth coefficient.
Methods of Frequency Domain Intra-Orthogonal Frequency-Division Multiplexing (OFDM) Symbol Multi Rx-Beam Measurement and Dynamic Rx Beam Sweeping
A communication device comprises a receiver including at least two receive antennas and configured to receive at least one reference signal of a plurality of reference signals, each reference signal being transmitted from at least one base station at a predefined reference signal transmission time; a controller configured to switch between at least two receive configurations of the at least two antennas during a reception period of the at least one reference signal; and a signal quality determiner configured to determine a parameter indicative of a first signal quality of the received reference signal for each receive configuration.
PHASE AND AMPLITUDE ERROR CORRECTION IN A TRANSMISSION CIRCUIT
Phase and amplitude error correction in a transmission circuit is provided. The transmission circuit includes a transceiver circuit, a power management integrated circuit (PMIC), and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from an input vector, the PMIC generates a modulated voltage, and the power amplifier circuit(s) amplifies the RF signal(s) based on the modulated voltage. In embodiments disclosed herein, the transceiver circuit is configured to equalize the input vector using multiple complex filters to thereby correct amplitude-amplitude (AM-AM) and amplitude-phase (AM-PM) errors. As a result, it is possible to reduce undesired instantaneous excessive compression and/or spectrum regrowth to thereby improve efficiency and linearity of the power amplifier circuit(s) across the modulation bandwidth.
Near-zero latency analog bi-quad infinite impulse response filter
Examples provide a method and apparatus for an analog bi-quad infinite impulse response (IIR) filter. An amplifier generates a positive output signal corresponding to a received RF signal and a negative output signal. A set of selectively switchable time-delay circuits associated with a positive arm of the filter causes a predetermined delay corresponding to a desired sample frequency. A first set of configurable variable gain amplifiers amplify the positive output signal to establish a set of positive coefficients. A set of selectively switchable time-delay circuits associated with a negative arm of the filter causes a predetermined delay. A delayed negative output signal is generated which is amplified by a second set of configurable variable gain amplifiers to establish a set of negative coefficients. A set of power combiners function as sum junctions to combine the delayed positive output signals and the delayed negative output signals into a single output signal.
Enhanced equalization based on a combination of reduced complexity MLSE and linear equalizer for heavily ISI-induced signals
A system for digitally equalizing a data channel with heavily ISI-induced signals received after passing a data communication channel using a combination of a linear equalizer and a nonlinear equalizer, which comprises an ADC, for sampling a received signal and converting it to a digital form; a Linear Equalizer for pre-processing said received signal, said Linear Equalizer is adapted to pre-process a first group consisting of echoes/channel taps of the induced ISI, which are not equalized by said nonlinear equalizer, by eliminating the echoes/channel taps of said first group; pre-process a second group consisting of the combination of the entire echoes/channel taps of the induced ISI, by eliminating the echoes/channel taps of said second group; and a nonlinear equalizer for receiving the signals preprocessed by said Linear Equalizer and for further processing said preprocessed signals and eliminating the echoes/channel taps of the induced ISI to be equalized by said nonlinear equalizer, thereby compensating for the entire ISI induced by said channel.
TIMING RECOVERY WITH ADAPTIVE CHANNEL RESPONSE ESTIMATION
System and method of timing recovery for recovering a clock signal by using adaptive channel response estimation. The channel response estimation in the timing recovery loop is dynamically adapted to the current channel response that varies over time. More particularly, the channel estimation coefficients used in a channel estimator can be adapted based on an error signal representing the difference between a received signal at the timing recovery loop and an estimated signal output from a channel estimator. Further, to prevent undesirable interaction between the channel estimator and the overall timing recovery loop with respect to clock phase recovery, the adaptation of channel estimation can be controlled in terms of speed or time so as to reduce or eliminate the channel estimator's effect on clock phase correction.
ENHANCED DISCRETE-TIME FEEDFORWARD EQUALIZER
An N-tap feedforward equalizer (FFE) comprises a set of N FFE taps coupled together in parallel, a filter coupled between the (N−1)th FFE tap and the Nth FFE tap, and a summer coupled to an output of the set of N FFE taps. Each FFE tap includes a unique sample-an-hold (S/H) circuit that generates a unique time-delayed signal and a unique transconductance stage that generates a unique transconductance output based on the unique time-delayed signal. The filter causes the N-tap FFE to have the behavior of greater than N taps. In some examples, the filter is a first order high pass filter that causes coefficients greater than N to have an opposite polarity of the Nth coefficient. In some examples, the filter is a first order low pass filter that causes coefficients greater than N to have the same polarity as the Nth coefficient.
CLI MEASUREMENT REPORTING IN TELECOMMUNICATION SYSTEMS
According to a first example embodiment, a method may include transmitting, by a network entity, at least one radio resource control (RRC)-based cross link interference (CLI) measurement framework object configured for at least one user equipment (UE) CLI measurement. The method may further include receiving, by the network entity, at least one reporting message. The method may further include resolving at least one inter-UE CLI problem on a semi-dynamic time scale based upon reporting rates associated with RRC measurements and/or pre-defined behavior.
OPTIMIZING HOST / MODULE INTERFACE
Embodiments address optimization of an electrical interface between an optical host device and an optical module device at installation time. Certain methods try each entry in a set of Finite Impulse Response (FIR) filter settings at the host transmitter, while asking the module to measure the signal integrity for each. The module will then provide an indication of which entry was the best choice for signal integrity in the current hardware configuration. Note that for the module to host electrical interface, this same technique can be used in reverse, whereby the host asks the module to configure its transmitting FIR filter, and the host records and keeps track of which filter setting is the best, and then configures the module with that filter setting. In both cases, for modules supporting CMIS (Common Management Interface Specification) for module configuration and control, methods are provided.
INDUCTORLESS INTERFERENCE CANCELLATION FILTER
A programmable filter includes a first programmable filter instance comprising a first adjustable active inductance capacitively coupled to a signal receive path, the capacitive coupling comprising at least one adjustable capacitance, the adjustable active inductance and the at least one adjustable capacitance configurable to provide a filter response at a first selected frequency, and a second programmable filter instance comprising a second adjustable active inductance capacitively coupled to the signal receive path, the capacitive coupling comprising at least one adjustable capacitance, the second adjustable active inductance and the at least one adjustable capacitance configurable to provide a filter response at a second selected frequency.