H04L25/4925

Multi-level encoding for battery management system field

A battery management system comprises a first battery cell controller; a second battery cell controller, the first battery cell controller and the second battery cell controller each monitoring a plurality of battery cells; and a galvanically isolated transmission line providing a point-to-point signal transmission path between the first battery cell controller and the second battery cell controller. At least one of the first battery cell controller or the second battery cell controller includes at least one encoding/decoding circuit for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique, including modulating the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency, encoding a plurality of data nibbles of the serial data stream into a data packet, the data packet including a plurality of symbols constructed and arranged with at least four consecutive chips per symbol, wherein the at least four consecutive chips per symbol of the data packet includes a DC balanced line code in each of the symbols.

Multi-level signal transmitter and method thereof

A multi-level signal transmitter includes an encoder figured to receive an input data and output a plurality of logical signal sets, each of said plurality of logical signal sets comprising a plurality of logical signals; and a plurality of tree-structured drivers configured to receive said plurality of logical signal sets, respectively, and jointly establish an output voltage at an output node, wherein each of said tree-structure drivers comprises a plurality of inverters configured to receive said plurality of logical signals of its respective logical signal set and jointly establish a joint voltage at a bifurcation node via coupling to the bifurcation node through a plurality of first-level weighting resistors, and a second-level weighting resistor configured to couple the bifurcation node to the output node.

High-speed data transmitting/receiving system and method of removing simultaneous switching noise and inter-symbol interference

Disclosed are high-speed data transmitting/receiving system and method capable of removing simultaneous switching noise and ISI at low cost and a small area. A transmitter used in the data transmitting/receiving system includes: a data mapping unit which maps 2-bit input data to one of codes, wherein the voltage level of a first signal line, the voltage level of a second signal line, and the voltage level of a third signal line are set in each of the codes; and a transmit driver which outputs data corresponding to the input data through the first signal line, the second signal line, and the third signal line having the voltage levels corresponding to the mapped code. Here, each of the voltage levels is ‘+1’, ‘0’ or ‘−1’, and the number of signal lines having the voltage level of ‘+1’ is the same as the number of signal lines having the voltage level of ‘−1’.

Multi-level encoding for battery management system

A battery management system comprises a first and second battery cell controllers and a transmission line providing a point-to-point signal transmission path between the first and second battery cell controllers. At least one of the first and second battery cell controllers includes a logic circuit constructed and arranged for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique. The logic circuit comprises an encoding/decoding circuit that generates a modulated signal of the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency for transmission through the transmission line and encodes a plurality of data units of the serial data stream into a data packet. The data packet includes at least three symbols constructed and arranged with at least four consecutive transmissions per symbol. Each transmission of each symbol assumes one of the three discrete signal levels. At least one transceiver is configured in a transmit mode or a receive mode and that discards any combinations of the maximum number of possible combinations to reduce a source of electromagnetic interference (EMI) on the transmission line.

MULTI-LEVEL SIGNAL TRANSMITTER AND METHOD THEREOF
20220337458 · 2022-10-20 ·

A multi-level signal transmitter includes an encoder figured to receive an input data and output a plurality of logical signal sets, each of said plurality of logical signal sets comprising a plurality of logical signals; and a plurality of tree-structured drivers configured to receive said plurality of logical signal sets, respectively, and jointly establish an output voltage at an output node, wherein each of said tree-structure drivers comprises a plurality of inverters configured to receive said plurality of logical signals of its respective logical signal set and jointly establish a joint voltage at a bifurcation node via coupling to the bifurcation node through a plurality of first-level weighting resistors, and a second-level weighting resistor configured to couple the bifurcation node to the output node.

Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication

Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.

Repeater and relay method for the same

A repeater includes a reception unit, a permission signal generating unit that detects the state of the pulses of the signal, and generates a permission signal that permits a relay of the signal when the permission signal generating unit detects the pulses, and that inhibits the relay of the signal when the permission signal generating unit detects an end of the pulses, and a transmission unit. When detecting the end of the pulses, for the permission signal, the permission signal generating unit sets a pulse re-input monitoring period for determining whether or not the pulses of the signal are re-detected. When detecting the pulses of the signal during the pulse re-input monitoring period, the permission signal generating unit determines that the signal continues, and when not detecting the pulses of the signal, the permission signal generating units determines that the signal ends.

REPEATER AND RELAY METHOD FOR THE SAME
20210119838 · 2021-04-22 ·

A repeater includes: a reception unit that receives a signal in the form of pulses; a permission signal generating unit that detects the state of the pulses of the signal, and generates a permission signal that permits a relay of the signal when the permission signal generating unit detects the pulses, and that inhibits the relay of the signal when the permission signal generating unit detects an end of the pulses; and a transmission unit that transmits the signal during a time period permitted by the permission signal. When detecting the end of the pulses, for the permission signal, the permission signal generating unit sets a pulse re-input monitoring period for determining whether or not pulses of the signal are re-detected. When detecting the pulses of the signal during the pulse re-input monitoring period, the permission signal generating unit determines that the signal continues, and when not detecting the pulses of the signal, the permission signal generating units determines that the signal ends.

MULTI-LEVEL ENCODING FOR BATTERY MANAGEMENT SYSTEM

A battery management system comprises a first and second battery cell controllers and a transmission line providing a point-to-point signal transmission path between the first and second battery cell controllers. At least one of the first and second battery cell controllers includes a logic circuit constructed and arranged for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique. The logic circuit comprises an encoding/decoding circuit that generates a modulated signal of the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency for transmission through the transmission line and encodes a plurality of data units of the serial data stream into a data packet. The data packet includes at least three symbols constructed and arranged with at least four consecutive transmissions per symbol. Each transmission of each symbol assumes one of the three discrete signal levels. At least one transceiver is configured in a transmit mode or a receive mode and that discards any combinations of the maximum number of possible combinations to reduce a source of electromagnetic interference (EMI) on the transmission line.

MULTI-LEVEL ENCODING FOR BATTERY MANAGEMENT SYSTEM FIELD

A battery management system comprises a first battery cell controller; a second battery cell controller, the first battery cell controller and the second battery cell controller each monitoring a plurality of battery cells; and a galvanically isolated transmission line providing a point-to-point signal transmission path between the first battery cell controller and the second battery cell controller. At least one of the first battery cell controller or the second battery cell controller includes at least one encoding/decoding circuit for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique, including modulating the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency, encoding a plurality of data nibbles of the serial data stream into a data packet, the data packet including a plurality of symbols constructed and arranged with at least four consecutive chips per symbol, wherein the at least four consecutive chips per symbol of the data packet includes a DC balanced line code in each of the symbols.