A device for transmitting data includes a transmitter for generating a frequency-modulated output signal. The transmitter includes a phase-locked loop for adjusting an output frequency of the output signal to a carrier frequency, and a coupling circuit for coupling a data stream into the phase-locked loop. The output signal modulated in frequency by the coupled-in data stream has an output frequency variable over time, and the coupling circuit includes a compensation unit, which couples a compensation signal into the phase-locked loop. The compensation signal compensates at least approximately for an adjustment of the output frequency to the carrier frequency carried out by the phase-locked loop.

A receiver system for demodulating a high-entropy continuous phase modulation (HE-CPM) signal is disclosed. A plurality of complex multipliers is configured to receive the synchronized HE-CPM signal. Each of the complex multipliers removes a phase associated with a respective one of a plurality of inter-symbol interference (ISI) hypotheses and generates a respective one of a plurality of complex multiplier outputs. Each ISI hypothesis includes a previous chip hypothesis corresponding to a binary value for a previous chip, and a next chip hypothesis corresponding to a binary value for a next chip. A summer is configured to combine real parts of the plurality of complex multiplier outputs to generate a soft decision for a current chip of the HE-CPM signal.

Communication systems and methods in accordance with various embodiments of the invention utilize modulation on zeros. Carrier frequency offsets (CFO) can result in an unknown rotation of all zeros of a received signal's z-transform. Therefore, a binary MOCZ scheme (BMOCZ) can be utilized in which the modulated binary data is encoded using a cycling register code (e.g. CPC or ACPC), enabling receivers to determine cyclic shifts in the BMOCZ symbol resulting from a CFO. Receivers in accordance with several embodiments of the invention include decoders capable of decoding information bits from received discrete-time baseband signals by: estimating a timing offset for the received signal; determining a plurality of zeros of a z-transform of the received symbol; identifying zeros from. the plurality of zeros that encode received bits by correcting fractional rotations resulting from the CFO; and decoding information bits based upon the received bits using a cycling register code.

The invention discloses a modulator, a demodulator and a wireless communication system. The wireless communication system comprises a modulator and a demodulator. The modulator is suitable for generating a target linear frequency modulation signal, wherein the target linear frequency modulation signal is a signal of which the frequency is varied linearly over time, wherein the phase of the target linear frequency modulation signal is determined by an initial frequency and a frequency stepping of the target linear frequency modulation signal, and the frequency stepping is determined by the bandwidth of the target linear frequency modulation signal and the spreading factor of the target linear frequency modulation signal. The demodulator is suitable for demodulating the target linear frequency modulation signal. According to the scheme, power consumption can be reduced while long-distance signal transmission is realized.

A digital frequency modulation receiver includes a phase capturer, an adder, a digital filter and a phase estimator. The phase estimator is used to generate a first phase value according to an input signal. The adder is coupled to the phase estimator for subtracting a second phase value from the first phase value to generate a phase difference. The digital filter is coupled to the adder for performing a filtering calculation with the phase difference so as to generate a frequency variation signal. The phase estimator is coupled to the digital filter and the adder so as to update the second phase value according to the frequency variation signal.

Apparatus and methods for disrupting or preventing periodicity in DTC circuits are provided. In an example, a communication circuit can include a digital-to-time converter (DTC) and a processing path coupled to the DTC. The DTC can be configured to receive reference information, modulation information and first dither information, and to provide a modulated signal using the reference information, the modulation information and the first dither information. The processing path can be configured to receive second dither information and to cancel the first dither information using the second dither information, wherein the DTC is configured to disrupt processing periodicity of the communication circuit using the first dither information.

A radio transmission method which includes a steps of simulation of a phase modulation of a radio carrier by the successive transmission of a carrier of a main frequency f and of a carrier of an offset frequency f+Δf, the offset frequency having a frequency difference suitable for simulating a given phase shift of the main frequency at the end of a given time T. The invention further relates to a radio transmission device for implementing the method which includes a radio integrated circuit for generating programmable frequency modulation, means for programming, in this radio integrated circuit, the main frequency f and the offset frequency f+Δf and means for driving this radio integrated circuit in order to generate the frequencies as a function of the signal to be transmitted.

Systems and methods for transpositional modulation and demodulation are provided. One such method for generating a signal includes the steps of providing a look-up table having a plurality of quarter-cycle waveforms, each of said quarter-cycle waveforms associated with a respective input level; receiving an input signal; and outputting quarter-cycle waveforms associated with levels of the received input signal. Systems for transpositional modulation are also provided. One such system for generating a signal includes a look-up table having a plurality of quarter-cycle waveforms. Each of the quarter-cycle waveforms are associated with a respective input level, and the look-up table is configured to receive an input signal, and output quarter-cycle waveforms associated with levels of the received input signal.

Systems and methods are directed to phase modulation of polar coordinates in a transmitter of wireless signals, to achieve high transmit power levels while meeting spectral mask and EVM requirements. An input signal is mapped to a sequence of modulation frequency (e.g., O-QPSK to MSK) to generate a mapped signal. A digital frequency shaping filter is applied to the mapped signal to generate a shaped signal. An adaptive rounding algorithm is applied to the shaped signal to generate a reduced bit-width signal. A digital frequency synthesizer is applied to the reduced bit-width signal to generate an analog waveform for transmission.

Communication systems and methods in accordance with various embodiments of the invention utilize modulation on zeros. Carrier frequency offsets (CFO) can result in an unknown rotation of all zeros of a received signal's z-transform. Therefore, a binary MOCZ scheme (BMOCZ) can be utilized in which the modulated binary data is encoded using a cycling register code (e.g. CPC or ACPC), enabling receivers to determine cyclic shifts in the BMOCZ symbol resulting from a CFO. Receivers in accordance with several embodiments of the invention include decoders capable of decoding information bits from received discrete-time baseband signals by: estimating a timing offset for the received signal; determining a plurality of zeros of a z-transform of the received symbol; identifying zeros from the plurality of zeros that encode received bits by correcting fractional rotations resulting from the CFO; and decoding information bits based upon the received bits using a cycling register code.