Patent classifications
H04L27/2272
Power saving by combining multiple bandwidth parts (BWPs) into a single wideband channel
A method of wireless communications by a user equipment (UE) includes detecting, in response to a bandwidth part (BWP) switch, a first BWP of a first carrier aggregation signal and a second BWP of a second carrier aggregation signal. The first BWP of the first carrier aggregation signal and the second BWP of the second carrier aggregation signal are each within a predetermined frequency range of each other. The method also includes tuning a radio frequency (RF) channel to a center of a wideband channel including the first BWP and the second BWP. The method further includes processing the wideband channel including both the first BWP of the first carrier aggregation signal and the second BWP of the second carrier aggregation signal with a single phase locked loop (PLL).
DTV RECEIVING SYSTEM AND METHOD OF PROCESSING DTV SIGNAL
A digital television (DTV) receiving system includes an information detector, a resampler, a timing recovery unit, and a carrier recovery unit. The information detector detects a known data sequence which is periodically inserted in a digital television (DTV) signal received from a DTV transmitting system. The resampler resamples the DTV signal at a predetermined resampling rate. The timing recovery unit performs timing recovery on the DTV signal by detecting a timing error from the resampled DTV signal using the detected known data sequence. The carrier recovery unit performs carrier recovery on the resampled DTV signal by estimating a frequency offset value of the resampled DTV signal using the detected known data sequence.
Channel equalization
Circuits, methods, and apparatus that provide improved data recovery for data transmitted through a channel of limited bandwidth. An example can provide circuits, methods, and apparatus that can equalize losses in a physical channel. This equalization can provide an overall channel response that is more consistent and uniform.
WEARABLE ALARM SYSTEM INCORPORATING PHASED-ARRAY RADAR WATER SENSING
A safety system comprised of safety devices each worn by a caretaker and up to three people requiring minding, that alerts using color coded LED lights and audible tones when a monitored person is in danger. The device alerts if the person is beyond a preset distance, is close to or is in a body of water, or signals they are in trouble, using phased-array radar coupled with image processing.
The phased-array radar allows the remote sensing of water in either daylight or night. The phased-array radar comprises multiple antenna elements including an independent antenna element phase shifter allowing beamsteering. The device scans an object using a preset beamsteering algorithm independent of movement. The multiple antenna elements and beamsteering improve image data accuracy which is then interpreted and correlated with a body of water characteristics. The phased-array radar is also used for caretaker-monitored person communications.
Voltage controlled oscillator, semiconductor integrated circuit, and transmission and reception device
A voltage controlled oscillator includes a first inductor; a first variable capacitance unit including a first variable capacitance element having a variable capacitance and a second variable capacitance element having a variable capacitance; a first node configured for application of a first voltage to the first variable capacitance unit; a cross-coupled unit including a first transistor and a second transistor, an output of the first transistor connected to an input of the second transistor; a current source configured to flow a current through the first inductor, the first transistor, and the second transistor; a second variable capacitance unit including a third variable capacitance element having a variable capacitance, and a fourth variable capacitance element having a variable capacitance; and a second node different from the first node configured for application of a second voltage to the second variable capacitance unit.
SIGNAL PROCESSING APPARATUS AND METHOD
The present technology relates to a signal processing apparatus and method which can suppress increase in power consumption.
In an aspect of the present technology, control data, which is for controlling frequency modulation to a carrier signal using digital data to be transmitted, and for suppressing a time average of a fluctuation amount of a frequency modulation amount more than a case of controlling the frequency modulation to the carrier signal using the digital data is generated, the frequency modulation is performed to the carrier signal on the basis of the generated control data, and the carrier signal to which the frequency modulation is performed is transmitted as a transmission signal. The present technology can be applied to, for example, a signal processing apparatus, a transmission apparatus, a reception apparatus, a communication apparatus, or an electronic apparatus having a transmission function, a reception function, or a communication function, or a computer which controls these.
DTV receiving system and method of processing DTV signal
A digital television (DTV) receiving system includes an information detector, a resampler, a timing recovery unit, and a carrier recovery unit. The information detector detects a known data sequence which is periodically inserted in a digital television (DTV) signal received from a DTV transmitting system. The resampler resamples the DTV signal at a predetermined resampling rate. The timing recovery unit performs timing recovery on the DTV signal by detecting a timing error from the resampled DTV signal using the detected known data sequence. The carrier recovery unit performs carrier recovery on the resampled DTV signal by estimating a frequency offset value of the resampled DTV signal using the detected known data sequence.
Serializer/deserializer (SerDes) lanes with lane-by-lane datarate independence
A circuit and method enables multiple serializer/deserializer (SerDes) data lanes of a physical layer device (PHY) to operate across a broad range of diversified data rates that are independent from lane to lane. The multiple SerDes data lanes may operate at data rates independent from one another. A single low frequency clock is input to the PHY. A frequency of the single low frequency clock is increased via a common integer-N phase-locked loop (PLL) on the PHY to produce a higher frequency clock. Each of the SerDes data lanes is operated, independently, as a fractional-N PLL that employs the higher frequency clock. Use of the common integer-N PLL enables modulation noise of the fractional-N PLLs to be suppressed by moving the modulation noise to higher frequencies where a level of the modulation noise is filtered, avoiding use of high risk noise cancellation techniques.
CHANNEL EQUALIZATION
Circuits, methods, and apparatus that provide improved data recovery for data transmitted through a channel of limited bandwidth. An example can provide circuits, methods, and apparatus that can equalize losses in a physical channel. This equalization can provide an overall channel response that is more consistent and uniform.
POWER SAVING BY COMBINING MULTIPLE BANDWIDTH PARTS (BWPs) INTO A SINGLE WIDEBAND CHANNEL
A method of wireless communications by a user equipment (UE) includes detecting, in response to a bandwidth part (BWP) switch, a first BWP of a first carrier aggregation signal and a second BWP of a second carrier aggregation signal. The first BWP of the first carrier aggregation signal and the second BWP of the second carrier aggregation signal are each within a predetermined frequency range of each other. The method also includes tuning a radio frequency (RF) channel to a center of a wideband channel including the first BWP and the second BWP. The method further includes processing the wideband channel including both the first BWP of the first carrier aggregation signal and the second BWP of the second carrier aggregation signal with a single phase locked loop (PLL).