A circuit and method for timing-tolerant optical pulse energy electrical conversion receives a current pulse stream converted from an input optical pulse stream (which may be periodic or nonperiodic), converts the current pulse stream to an electrical waveform of voltage pulses and detects each voltage pulse, e.g., by its leading edge. The conversion circuit may include a divider circuit for receiving the electrical waveform, dividing the waveform into a multi-channel output of divided electrical waveforms, and sequential logic circuits for adjusting a width window of each voltage pulse according to an adjustable delay.

A circuit includes a voltage-controlled oscillator (VCO) and a frequency divider. The frequency divider input is coupled to the VCO output. The circuit further includes a phase-frequency detector (PFD). A control output of the PFD is coupled to the VCO. A first PFD input is coupled to a first frequency divider output, and a second PFD input is coupled to a second frequency divider output. The first frequency divider output is configured to provide a first frequency divider signal and the second frequency divider output is configured to provide a second frequency divider signal 90 degrees out of phase with respect to the first frequency divider signal. The PFD is configured to detect an occurrence of at least two edges of a signal on the data input while the second frequency divider signal is continuously logic high across the at least two edges.

A data transmitting and receiving system includes a first device including an encoder configured to encode row data to generate precoding data and a transmitter configured to transmit the precoding data through a transmission channel and a second device including an integrator configured to perform an integral on the precoding data, an integral sampler including a plurality of samplers configured to output sampling data based on an offset value and an output value of the integrator, a decoder configured to decode outputs of some of the samplers to generate decoded data, and a phase detector configured to detect a phase difference between the precoding data and a clock based on the decoded data and an output of another one of the samplers.

A circuit and method for timing-tolerant optical pulse energy electrical conversion receives a current pulse stream converted from an input optical pulse stream (which may be periodic or nonperiodic), converts the current pulse stream to an electrical waveform of voltage pulses and detects each voltage pulse, e.g., by its leading edge. The conversion circuit may include a divider circuit for receiving the electrical waveform, dividing the waveform into a multi-channel output of divided electrical waveforms, and sequential logic circuits for adjusting a width window of each voltage pulse according to an adjustable delay.

An integrated circuit receiver is disclosed comprising a data receiving circuit responsive to a timing signal to detect a data signal and an edge receiving circuit responsive to the timing signal to detect a transition of the data signal. One of the data or edge receiving circuits comprises an integrating receiver circuit while the other of the data or edge sampling circuits comprises a sampling receiver circuit.

A clock data recovery unit includes: a phase corrector generating a first compensation clock signal and a second compensation clock signal based on an external clock signal; and a transition detector, wherein the transition detector comprises: a first integrator configured to integrate a first training pattern signal according to the first compensation clock signal to provide a first integration signal; and a second integrator configured to integrate the first training pattern signal according to the second compensation clock signal to provide a second integration signal, wherein, in response to the first integration signal being greater than a first reference voltage and the second integration signal being less than the first reference voltage, occurrence of a transition of the first training pattern signal is detected.

An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal.

A phase locked loop has an integer phase detector to detect an integer phase by measuring a cycle number, a fractional phase detector to detect a fractional phase of smaller than one cycle between a reference signal and the oscillation signal, a frequency error generator to generate a frequency error signal between the reference signal and the oscillation signal, a glitch corrector to correct the frequency error signal to generate and output a glitch-corrected signal and the frequency error signal, a phase error generator to generate a phase error by integrating an output signal of the glitch corrector, an oscillator controller to control an oscillation frequency of the oscillation signal, and a synchronous detector to detect whether a phase of the reference signal and a phase of the oscillation signal are in an phase-lock state, and to stop detection of the integer phase when the phase-lock state is detected.

On the basis of the peak point of the integrated waveform of the reception signal for each one-bit time, a timing of resetting the integrated value of the reception signal for each one-bit time and a timing of determining whether a voltage of the reception signal for each one-bit time is high or low are indicated.

A wireless communication device for asymmetrical frequency spreading including a processor configured to receive a frequency band message comprising a maximum difference and a minimum difference, wherein the maximum difference is between a maximum frequency of a sub-band and a signal frequency, and wherein the minimum difference is between the minimum frequency of the sub-band and the signal frequency compare the maximum difference and the minimum difference with each other; and generate a frequency shift based on the comparison.