Patent classifications
H04L7/065
Network physical layer transceiver with single event effect detection and response
A physical layer transceiver and a network node including the transceiver. The transceiver includes a media independent interface, a converter circuit block comprising circuitry configured to convert digital signals to analog signals for transmission over a network communications medium and convert analog signals received over the medium to digital signals, and one or more processing blocks configured to process digital data communicated between the media independent interface and the converter circuit block according to a network protocol. Management and control circuitry including power management circuitry and reset circuitry are provided. The transceiver further includes at least one single event effect (SEE) monitor, such as an ambience monitor, a configuration register monitor, a state machine monitor, or a phase locked loop (PLL) lock monitor, configured to detect and respond to an SEE event in the transceiver.
Transmitting device, receiving device, repeating device, and transmission/reception system
One embodiment relates to a transmitting device, a receiving device, and the like for preventing increases in the number of communication links, power consumption, and circuit layout area. The transmitting device includes a high-speed signal generator, a low-speed signal generator, and a signal superimposing unit. The high-speed signal generator generates a high-speed signal having a limited frequency band. The low-speed signal generator generates a low-speed signal having a frequency lower than the frequency band of the high-speed signal. The signal superimposing unit outputs a superimposed signal of the high-speed signal and the low-speed signal. The receiving device includes a signal separator and a recovery unit. The signal separator separates the received signal into the high-speed signal and the low-speed signal. The recovery unit performs frequency tracking based on the separated low-speed signal and performs phase tracking based on the separated high-speed signal.
Data Transmission Method, Transmit End Device, and Receive End Device
The present disclosure discloses a data transmission method, a transmit end device, and a receive end device. The method includes performing bit mapping processing on a first part of bits of a first data bit group, to generate a first modulation symbol and determining a first precoding matrix from multiple preset precoding matrices according to a second part of bits of the first data bit group. The method also includes performing precoding processing on the first modulation symbol according to the first precoding matrix, to obtain a first modulation symbol matrix and transmitting the first modulation symbol matrix to a receive end device by using at least two antennas.
Communication unit and method for clock distribution and synchronization
A communication unit (300) is described that includes a plurality of cascaded devices that includes at least one master device and at least one slave device configured in a master-slave arrangement. The at least one master device comprises a modulator circuit (362) configured to: receive a system clock signal and a frame start signal; modulate the system clock signal with the frame start signal to produce a modulated master-slave clock signal (384); and transmit the modulated master-slave clock signal (384) to the at least one slave device. The at least one slave device comprises a demodulator circuit (364) configured to: receive and demodulate the modulated master-slave clock signal (384); and re-create therefrom the system clock signal (388, 385) and the frame start signal (390, 386).
Layered modulation with multiple coding rates for machine type communication (MTC) transmissions
The base station includes an encoder that encodes a first set of bits of MTC information with a first coding rate and encodes a second set of MTC information bits with a second coding rate. The first set and second set of bits are modulated using layered modulation and broadcast within the service area of the base station in a first transmission such that the first set of bits can be recovered using the low modulation order and the second set of bits can be recovered using the high modulation order. A relay station receives, demodulates and decodes the first transmission to recover at least the second set of bits. The relay station transmits a second set transmission including at least the second set of bits to at least one MTC device that did not recover the second set of bits from the first transmission.
Layered modulation for machine type communication (MTC) transmissions from multiple transceiver stations
A first transceiver station broadcasts information to machine type communication (MTC) devices in the coverage area of the transceiver station using layered modulation where MTC devices receiving the broadcast above a signal quality threshold can recover the MTC information by applying a high modulation order. MTC devices receiving the broadcast below the quality threshold, recover a portion of the MTC information by applying a lower modulation order and recover the remaining portion of the MTC information transmitted from a second transceiver.
LAYERED MODULATION FOR MACHINE TYPE COMMUNICATION (MTC) TRANSMISSIONS FROM MULTIPLE TRANSCEIVER STATIONS
A first transceiver station broadcasts information to machine type communication (MTC) devices in the coverage area of the transceiver station using layered modulation where MTC devices receiving the broadcast above a signal quality threshold can recover the MTC information by applying a high modulation order. MTC devices receiving the broadcast below the quality threshold, recover a portion of the MTC information by applying a lower modulation order and recover the remaining portion of the MTC information transmitted from a second transceiver.
Method for synchronizing radio frequency carrier correction of dynamic radio frequency carriers
A method for synchronizing radio frequency carrier correction of dynamic radio frequency carriers is provided. The method includes receiving a carrier configuration from a carrier controller to modulate a carrier signal based on the carrier configuration and receiving a time reference and timestamped carrier configuration information from the carrier controller. The timestamped carrier configuration information includes a correlation between a plurality of timestamps and a plurality of carrier attributes. The method also includes synchronizing an internal clock of a RF correction preprocessor to the time reference, and receiving a modulated carrier signal from the RF modem. The method further includes generating a radio frequency correction set including a correction solution for each of a plurality of timeslots based on the timestamped carrier configuration information, and generating a corrected carrier signal based on applying the RF correction set to the modulated carrier signal at a coincident timeslot.
Transmission device, reception device, communication system, signal transmission method, signal reception method, and communication method
A transmission device of the disclosure includes: a clock signal transmitting circuit that outputs a clock signal onto a clock signal line; a data signal transmitting circuit that outputs a data signal onto a data signal line; and a blanking controller that controls the clock signal transmitting circuit to output a predetermined blanking signal, in place of the clock signal, from the clock signal transmitting circuit to the clock signal line in synchronization with a blanking period of the data signal.
Communication unit, integrated circuits and method for clock and data synchronization
A communication unit (700) is described that includes a plurality of cascaded devices that comprise at least one master device (710) and at least one slave device (720, 723) configured in a master-slave arrangement. The at least one master device (710) and at least one slave device (720, 723) each comprise: an analog-to-digital converter, ADC, (741, 742) configured to use a same re-created system clock signal (788, 790) to align respective sampling instants between each ADC (741, 742). The at least one master device (710) comprises: a clock generation circuit comprising an internally-generated reference phase locked loop circuit (708), configured to output a system clock signal (782, 784); and a modulator circuit (762) coupled to the clock generation circuit and configured to receive and distribute the system clock signal (784). The at least one master device (710) and at least one slave device (720, 723) each comprise: a demodulator circuit (764, 765) configured to receive the distributed system clock signal (784) and re-create therefrom a synchronized system clock signal (788, 790) used by a respective ADC, (741, 742) of each of the the master device (710) and at least one slave device (720).