Patent classifications
H05K1/111
CIRCUIT BOARD
A circuit board according to the embodiment includes a first substrate including a first insulating layer and a first pad disposed on an upper surface of the first insulating layer; a second substrate including a second insulating layer including a via hole and a metal layer formed on upper and lower surfaces of the second insulating layer and an inner wall of the via hole; a third insulating layer disposed between the first substrate and the second substrate and having a first opening in a region overlapping the via hole; a via filling the via hole and disposed on the first pad exposed through the opening of the third insulating layer; and a second pad disposed on the via and the metal layer disposed on an upper surface of the second insulating layer.
ELECTRONIC DEVICE INCLUDING ELECTROSTATIC DISCHARGE PATH
An electronic device may include a display module, a connecting member including a bending portion connected to a display panel of the display module and extending toward a rear surface of the display module, and a protective layer formed of an insulating material to cover the bending portion, a printed circuit board disposed on a rear surface of the display module and connected to the display module by the connecting member, a frame disposed to surround at least a portion of the display module and formed of a conductive material, a side member including a first partition wall portion disposed between the frame and the display module to be spaced apart from the frame and a second partition wall portion disposed to be spaced apart from the display module and coveting at least a portion of an outer periphery of the display module.
HIGH SPEED ELECTRICAL CONNECTOR
A connector for use with high-speed signals. The connector may include a row of conductive elements comprising signal conductors and ground conductors. A signal conductor may include a mating end, a mounting end opposite the mating end, and an intermediate portion extending therebetween. A ground conductor may include a shell at least partially encircling intermediate portions of a group of signal conductors, with openings that expose contact surfaces of the signal conductors at the ends. The ground conductors may include contact members aligned with the mating contact surfaces of the signal conductors. Each shell may be coupled to a ground mounting location on each side of a respective group of signal conductors, with adjacent shells sharing a ground mounting location. Such a configuration may meet signal integrity requirements in connectors designed for 64 Gbps and beyond, while conforming to a standard that constrains mating and mounting interfaces.
PRINTED CIRCUIT BOARDS WITH EMBOSSED METALIZED CIRCUIT TRACES
A PCB that constructs circuit traces, vias, and connection pads by filling recessed areas, grooves, holes, and/or counter bores with conductive material. The recessed areas are filled with conductive ink or plating solutions by a number of methods. Capillary action aids in the filling of the recessed areas. Pressure, vacuum and or gravity can aid the filling. Layers of the PCB or similar type devices can be bonded together both mechanically and electrically to accomplish 3D connections of circuits. Ground and power plane durability and conductivity is enhanced by the inclusion of small grooves over the conductive plane.
Test board and semiconductor device test system including the same
A test board configured to test a device under test includes: a connection region including first and second connection terminals for contacting the device under test; and a first surface mount device located adjacent to the connection region, wherein the first connection terminal is configured to be electrically connected to a first voltage regulator of the device under test, wherein the second connection terminal is configured to be electrically connected to a second voltage regulator of the device under test, and wherein the first surface mount device is configured to be electrically connected to each of the first and second connection terminals.
Multilayer capacitor and board having the same mounted thereon
A multilayer capacitor includes a body having a plurality of dielectric layers and first and second internal electrodes alternately disposed with the dielectric layers interposed therebetween, and further including an active region in which the first and second internal electrodes overlap each other, and upper and lower covers disposed above and below the active region, respectively; and first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively, wherein the upper and lower covers include barium titanate (BT, BaTiO.sub.3) and Yttria-stabilized zirconia (YSZ).
Electronic component and board having the same mounted thereon
An electronic component and a board having the same mounted thereon are provided. The electronic component includes a capacitor body, a pair of external electrodes, respectively disposed on end portions of the capacitor body, a pair of metal frames, respectively disposed to be connected the pair of external electrodes, and a conductive bonding layer disposed between the external electrode and the metal frame and having a discontinuous region.
LAYOUT STRUCTURE OF FLEXIBLE CIRCUIT BOARD
A layout structure of flexible circuit board includes a flexible substrate, a circuit layer, a flip-chip element and an anti-stress circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. Bonding circuits and transmission circuits of the circuit layer are disposed on the chip mounting area and the circuit area respectively. The flip-chip element is disposed on the chip mounting area and includes bumps and a chip having a long side margin and conductive pads, the bumps are provided to connect the conductive pads and the bonding circuits. Anti-stress circuits of the anti-stress circuit layer are disposed on the chip mounting area and parallel to the long side margin of the chip, and the bumps are located between the anti-stress circuits and the long side margin of the chip.
CIRCUIT BOARD FOR LIGHT-EMITTING DIODE ASSEMBLY, BACKLIGHT UNIT INCLUDING THE SAME AND IMAGE DISPLAY DEVICE INCLUDING THE SAME
A circuit board for a light-emitting diode assembly includes a substrate layer, a dimming zone column disposed on one surface of the substrate layer, the dimming zone column including dimming zones, each of the dimming zones including a predetermined number of LED landing pads. The dimming zones includes a predetermined number of first dimming zones and a predetermined number of second dimming zones, a first common wiring commonly connected to the first dimming zones and disposed at a first lateral side in a row direction of the dimming zone column, a second common wiring connected to the second dimming zones and disposed at a second lateral side in the row direction opposite to the first lateral side of the dimming zone column, and an individual wiring connected to each of the dimming zones.
CIRCUIT BOARD FOR LIGHT-EMITTING DIODE ASSEMBLY, BACKLIGHT UNIT INCLUDING THE SAME AND IMAGE DISPLAY DEVICE INCLUDING THE SAME
A circuit board for a light-emitting diode assembly according to an embodiment includes a substrate layer, dimming zones formed on one surface of the substrate layer, each of the dimming zones comprising a predetermined number of LED landing pads, and a wiring bundle disposed between the dimming zones neighboring in a row direction to extend in a column direction, the wiring bundle including wirings connected to the LED landing pads at the same level.