Patent classifications
H05K2201/0311
METHOD FOR MANUFACTURING ELECTRICAL INTERCONNECTION STRUCTURE
Provided is a method of manufacturing an electrical connection structure which includes a female connection structure having an inner conductive material inside an insertion hole of a female connection member, and a male connection structure having a conductive column configured to be inserted into and fixed to the insertion hole to be in contact with the inner conductive material, and formed to protrude from a male connection member. The method includes preparing insulating members used for the female connection member and the male connection member, and forming the inner conductive material and the column by patterning a conductive material on each of the insulating member using a photolithography process.
Supporting-terminal-equipped capacitor chip and mounted structure thereof
A mounted structure of a supporting-terminal-equipped capacitor chip includes first and second supporting terminals. The first supporting terminal includes a first helical electrically conductive portion extending in a first axial direction along a main surface. The second supporting terminal includes a second helical electrically conductive portion extending in a second axial direction along the main surface. The first helical electrically conductive portion is electrically connected to a first outer electrode at an outer peripheral side surface of the first helical electrically conductive portion. The second helical electrically conductive portion is electrically connected to a second outer electrode at an outer peripheral side surface of the second helical electrically conductive portion.
ELECTRICAL INTERPOSER HAVING SHIELDED CONTACTS AND TRACES
A separable and reconnectable connector for semiconductor devices is provided that is scalable for devices having very small contact pitch. Connectors of the present disclosure include signal pins shielded by pins electrically-coupled to ground. One or more signal pins in a contact array are electrically-shielded by at least one ground pin coupled to a ground plane. Embodiments thereby provide signal pins, either single-ended or a differential pair, usable to transmit signals with reduced noise or cross-talk and thus improved signal integrity. Embodiments further provide inner ground planes coupled to connector ground pins to shield pairs of differential signal pins without increasing the size of the connector. Inner grounding layers can be formed within isolation substrates incorporated into connector embodiments between adjacent pairs of signal pins. These buried ground layers provide additional crosstalk isolation in close proximity to signal pins, resulting in improved signal integrity in a significantly reduced space
CONNECTOR-LESS M.2 MODULE
Embodiments of connector-less modules and associated platforms employing the module. The module employs a Land Grid Array (LGA) comprising an array of LGA pins on the underside of the module PCB that are configured to engage respective pads patterned on a motherboard or system board PCB by applying a downward force to the module PCB. A novel clip assembly is provided to apply the downward force, while also aligning the module PCB (and its LGA) to the motherboard or system board PCB. A heat shield is provided that is configured to be disposed over the module PCB to facilitate enhanced thermal spreading and lowering thermal resistance both towards the heat shield and the PCBs. Example modules include a WWAN module and an NVMe SSD module. The module PCB may employ an M.2 form factor or other form factors.
Electromechanical Transducer Mount
Described herein is mechanically decoupling of an electromechanical transducer from a common substrate, enabling multiple transducers to be surface mounted to a common substrate such as a printed circuit board (PCB) without experiencing mechanical cross-coupling. The decoupling of the transducer from the substrate enables the transducers to be attached without reducing the efficiency of acoustic transduction. The design of the mount enables it to be assembled in an automated manner with pick and place tools.
Supporting-terminal-equipped capacitor chip and mounted structure thereof
Each of a supporting-terminal-equipped capacitor chip and a mounted structure thereof includes a capacitor chip and first and second supporting terminals that each have electric conductivity. A maximum diameter size of the first supporting terminal when viewed in an axial direction is larger than a maximum length size of a portion of a first outer electrode on a second main surface in a length direction. A maximum diameter size of the second supporting terminal when viewed in the axial direction is larger than a maximum length size of a portion of a second outer electrode on the second main surface in the length direction.
PCB module on package
Aspects of the disclosure provide a printed circuit board (PCB) system that includes an integrated circuit (IC) package, a first PCB and a PCB module. The IC package has a package substrate and an IC chip that is coupled to a top surface of the package substrate. The first PCB is configured to electrically couple with first contact structures that are disposed on a bottom surface of the package substrate. The PCB module includes a second PCB and one or more electronic components electrically coupled to the second PCB. The PCB module is configured to electrically couple with second contact structures that are disposed on the top surface of the package substrate.
IMPLANTABLE ELECTRONIC DEVICES
An implantable electronic device includes a flexible circuit board, one or more circuit components attached to the flexible circuit board and configured to convert electrical energy into electrical pulses, and one or more electrodes attached to the flexible circuit board without cables connecting the electrodes to each other or to the flexible circuit board, the one or more electrodes configured to apply the electrical pulses to a tissue adjacent the implantable electronic device.
SEALED INTERFACE POWER MODULE HOUSING
A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.
ELECTRICAL INTERPOSER HAVING SHIELDED CONTACTS AND TRACES
A separable and reconnectable connector for semiconductor devices is provided that is scalable for devices having very small contact pitch. Connectors of the present disclosure include signal pins shielded by pins electrically-coupled to ground. One or more signal pins in a contact array are electrically-shielded by at least one ground pin coupled to a ground plane. Embodiments thereby provide signal pins, either single-ended or a differential pair, usable to transmit signals with reduced noise or cross-talk and thus improved signal integrity. Embodiments further provide inner ground planes coupled to connector ground pins to shield pairs of differential signal pins without increasing the size of the connector. Inner grounding layers can be formed within isolation substrates incorporated into connector embodiments between adjacent pairs of signal pins. These buried ground layers provide additional crosstalk isolation in close proximity to signal pins, resulting in improved signal integrity in a significantly reduced space.