A ceramic carrier substrate for an electrical/electronic circuit. The substrate includes ceramic layers arranged one above the other in an interconnected structure and conductor tracks arranged on and/or in individual ceramic layers and connected to one another as the conductor structure for the electrical/electronic circuit. The interconnected structure is formed by a firing operation. A first conductor substructure is formed in a first interconnected structure subassembly which comprises at least one of the ceramic layers, and a second conductor substructure is formed in a second interconnected structure subassembly which is directly adjacent to the first interconnected structure subassembly and comprises at least one of the ceramic layers. The second conductor substructure substantially consists of high-current conductor tracks and is configured to contact a power circuit. The first conductor substructure substantially consists of signal conductor tracks and is configured to contact a drive circuit for the power circuit.

A covering film (100) includes a first covering layer (10), a first adhesive layer (20), and a thermal conductive layer (30) sandwiched between the first covering layer (10) and the first adhesive layer (20). A thermal conductivity of the thermal conductive layer (30) is K1, K1=3˜65 W/m.K. A thermal conductivity of the first covering layer (10) is K2, K2=0.02˜3.0 W/m.K. A thermal conductivity of the first adhesive layer (20) is K3, K3=0.02˜1.0 W/m.K. A circuit board and its manufacturing method are also provided.

A ceramic circuit board includes a ceramic base material, a metal layer (first metal layer), and a marker portion. The marker portion is formed on the surface of the first metal layer. The surface of the metal layer (first metal layer) may be plated. When the surface of the metal layer (first metal layer) is plated, the marker portion may be formed on the plating.

A method of forming integrated power electronics packages by 3D-printing the PCB on and around power devices includes bonding a power device to a first surface of a cold plate and printing, using a 3D-printer, a circuit board on and around the power devices such that the circuit board includes one or more insulating portions and one or more conductive portions.

A printed circuit board comprises N power switching cells operating in parallel and respectively comprising a transistor leg, at least one decoupling capacitor and a gate driver circuit. Each transistor leg comprises respective first and second transistors in series, a drain of the first transistor being connected to a positive DC line, a source of the second transistor being connected to a negative DC line, a source of the first transistor being connected to a drain of the second through a connection middle-point connected to an output terminal. Each gate driver circuit controls respective switching ON and OFF of the corresponding first and second transistors. The N transistor legs of the corresponding N power switching cells are positioned to substantially form a convex polygon having N edges of substantially the same length, each one of the N transistor legs being positioned along one of the edges of the convex polygon.

Provided is an electronic module comprising at least one electronic component. A thermoelectric cooler is in thermal contact with the electronic component. A temperature controller is capable of determining a device temperature of the electronic component is provided and capable of providing current to the thermoelectric cooler proportional to a deviation of the device temperature from an optimal temperature range.

The present disclosure generally relates to a computer circuit board having an integrated voltage regulator assembly that may include a heat sink and at least one voltage regulator module board. The heat sink may have a metal plate with at least one recess in which the voltage regulator module board may be attached. The voltage regulator module board is electrically coupled to a semiconductor package and the heat sink is thermally coupled to the semiconductor package. The computer circuit board is used in high-performance computing devices including computer workstations and computer servers.

Provided is a circuit assembly that enables suppression of a decrease in heat dissipation properties. A circuit assembly includes a circuit board having a conductive path, a heat dissipation member on which the circuit board is placed, and an insulating layer that is interposed between the circuit board and the heat dissipation member. A surface of the heat dissipation member that faces the circuit board is a rough surface having protrusions and recessions, and the circuit board and the heat dissipation member are fixed to each other by the insulating layer penetrating the protrusions and recessions of the rough surface.

To improve a TCT characteristic of a circuit substrate. The circuit substrate comprises a ceramic substrate including a first and second surfaces, and first and second metal plates respectively bonded to the first and second surfaces via first and second bonding layers. A three-point bending strength of the ceramic substrate is 500 MPa or more. At least one of L1/H1 of a first protruding portion of the first bonding layer and L2/H2 of a second protruding portion of the second bonding layer is 0.5 or more and 3.0 or less. At least one of an average value of first Vickers hardnesses of 10 places of the first protruding portion and an average value of second Vickers hardnesses of 10 places of the second protruding portion is 250 or less.

A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.