Patent classifications
H05K2201/09481
CIRCUIT BOARD
A circuit board according to the embodiment includes a first substrate including a first insulating layer and a first pad disposed on an upper surface of the first insulating layer; a second substrate including a second insulating layer including a via hole and a metal layer formed on upper and lower surfaces of the second insulating layer and an inner wall of the via hole; a third insulating layer disposed between the first substrate and the second substrate and having a first opening in a region overlapping the via hole; a via filling the via hole and disposed on the first pad exposed through the opening of the third insulating layer; and a second pad disposed on the via and the metal layer disposed on an upper surface of the second insulating layer.
PCB optical isolation by nonuniform catch pad stack
A Printed Circuit Board (PCB) includes a via extending through at least one layer of the PCB. The PCB may also include a first catch pad connected to the via and located within a first metal layer of the PCB. The first catch pad may have a first size. The PCB may further include a second catch pad connected to the via and located within a second metal layer of the PCB. The second catch pad may have a second size greater than the first size. The second catch pad may overlap horizontally with a portion of a metallic feature in the first metal layer to obstruct light incident on a first side of the PCB from transmission to a second side of the PCB through a region of dielectric material near the via.
BOARD-LEVEL PAD PATTERN FOR MULTI-ROW QFN PACKAGES
A board-level pad pattern includes a printed circuit board (PCB) substrate; an exposed pad region disposed within a surface mount region of the base substrate; and multiple staggered ball pads disposed within the surface mount region arranged in a ring shape around the exposed pad region. The staggered ball pads includes first ball pads arranged in a first row and second ball pads arranged in a second row. The first ball pads in the first row are arranged at two different pitches, and the second ball pads in the second row are arranged at a constant pitch. Multiple square-shaped ball pads are arranged in a third row between the exposed pad region and the staggered ball pads.
Circuit board
A circuit board is disclosed, including a circuit board body and at least one via apparatus provided on the circuit board body. The via apparatus includes a via (101) formed on the circuit board body, a via pad (201) surrounding the via and separately provided from the via, and an electrical conductor (301) electrically connecting the via pad (201) with the via (101).
ADAPTER BOARD, METHOD FOR MANUFACTURING THE SAME AND CIRCUIT BOARD ASSEMBLY USING THE SAME
The present disclosure provides an adapter board, a for manufacturing the same and a circuit board assembly. The adapter board includes a board body, a first component buried in the board body, a first connector located on a first surface of the board body and configured to be connected with a circuit board and a second component, a second connector located on a second surface of the board body and configured to be connected with a second component, a first conductive body and a second conductive body buried in the board body. One end of the first conductive body is connected with the first component. The other end of the first conductive body is connected with the first connector. One end of the second conductive body is connected with the first component. The other end of the second conductive body is connected with the second connector
LED assembly with omnidirectional light field
Disclosed is an LED assembly having an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.
HIGH FREQUENCY FILTER
A high frequency filter includes: a multilayer substrate including a first substrate for which lands are provided, a second substrate for which lands are provided, and a third substrate for which lands are provided, the third substrate being sandwiched between the first substrate and the second substrate; a columnar conductor electrically connected to the lands in the multilayer substrate; and columnar conductors provided to surround the columnar conductor, electrically connected to a ground plane of the first substrate, and electrically connected to a ground plane of the second substrate. The spacing between the lands of the first substrate and the lands of the third substrate and the spacing between the lands of the second substrate and the lands of the third substrate are electrical lengths of 90 degrees or less at the cutoff frequency.
PRINTED CIRCUIT BOARDS AND MEMORY MODULES
A PCB includes a plurality of layers spaced apart in a vertical direction, a first detection pattern and a second detection pattern and pads connected to the first detection pattern and the second detection pattern. The first detection pattern and the second detection pattern are provided in a respective one of a first layer and a second layer adjacent to each other such that the first detection pattern and the second detection pattern are opposed to each other. The pads are provided in an outmost layer. Each of the first detection pattern and the second detection includes at least one main segment extending in at least one of first and second horizontal directions and a diagonal direction. A time domain reflectometry connected to a pair of pads detects a misalignment of the PCB by measuring differential characteristic impedance of the first detection pattern and the second detection pattern.
INTEGRATED RF PASSIVE DEVICES ON GLASS
Embodiments disclosed herein include package substrates and methods of forming such package substrates. In an embodiment a package substrate comprises a glass core, and a vertically oriented inductor embedded in the glass core. In an embodiment, the inductor comprises vertical vias through the glass core, and where the vertical vias are electrically coupled together by conductive traces over a surface of the glass core to provide a plurality of conductive turns.
Component Carrier Interconnection and Manufacturing Method
A component carrier assembly includes a first component carrier having a first electrically insulating layer structure and a via in the first electrically insulating layer structure, where the via is at least partially filled with electrically conductive material and where an upper part of the via extends beyond an outer main surface of the first component carrier; and a second component carrier having a second electrically insulating layer structure, and an electrically conductive adhesive material that is at least partially embedded in the second electrically insulating layer structure. The first component carrier and the second component carrier are interconnected and the upper part of the via at least partially penetrates into the electrically conductive adhesive material.