A printed circuit board has a solder joint inspection system including a substrate surface having at least one solder pad thereon, at least one conductor wire having an end attached to the at least one solder pad, and a first inspection feature. A first inspection feature is marked on the substrate surface adjacent to the at least one solder pad to define a conductor end zone on the at least one solder pad. The end of the conductor wire is in the conductor end zone when properly attached. The at least one solder pad may define a second inspection feature to mark an extent to which the at least one solder pad is covered by a flow of solder when the wire is properly attached.

A wiring board includes a plurality of insulating layers each being made of flexible insulating resin, and a conductor layer that is laminated on the plurality of insulating layers and that has a conductor pattern. The conductor layer includes a conductor pattern that has a certain shape in which a plurality of unit patterns are connected in plan view. The unit pattern includes a U-shaped pattern, an inverted U-shaped pattern that is arranged such that an opening side is located away from an opening side of the U-shaped pattern, and a straight line pattern that connects center portions of the U-shaped pattern and the inverted U-shaped pattern.

A package includes a conductive pad, with a plurality of openings penetrating through the conductive pad. A dielectric layer encircles the conductive pad. The dielectric layer has portions filling the plurality of openings. An Under-Bump Metallurgy (UBM) includes a via portion extending into the dielectric layer to contact the conductive pad. A solder region is overlying and contacting the UBM. An integrated passive device is bonded to the UBM through the solder region.

An electronic board includes: a board including an upper surface ground on an upper surface; at least one first land formed on the upper surface and connected to a first signal line; at least one second land formed on the upper surface and connected to a second signal line; at least one third land disposed on the upper surface between the first land and the second land and connected to the upper surface ground; and at least one fourth land disposed on the upper surface on a side opposite to the third land and connected to the upper surface ground, the first land being interposed between the third land and the fourth land.

A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer; a surface electrode on a surface of the electronic component body; and a covering ceramic layer covering a peripheral section of the surface electrode. The peripheral section of the surface electrode that is covered by the covering ceramic layer has a thin portion located on a central side of the surface electrode and which is thinner than a central section of the surface electrode, and a width of the thin portion is 20% or more of a width of the peripheral section of the surface electrode that is covered by the covering ceramic layer.

A printed wiring board includes: a board having a through-hole; a land portion that is disposed on an inner circumferential surface of the through-hole and on a surface of the board at a circumferential edge of the through-hole, and that has a through-hole conductor portion; and a wire that is disposed on the surface of the board and that has one longitudinal end portion electrically connected to the land portion, a maximum length of a connection portion between the wire and the land portion being greater than or equal to a sum of a maximum diameter of the through-hole and a minimum line width of the wire.

There is provided a flexible printed circuit board. The flexible printed circuit board includes: a flexible insulation layer having a first surface and a second surface; a first land which is conductive and which is provided on the first surface of the flexible insulation layer; and a conductive member which is provided on the second surface of the flexible insulation layer. A recess is formed on the first land.

A package component includes a dielectric layer and a metal pad over the dielectric layer. A plurality of openings is disposed in the metal pad. The first plurality of openings is separated from each other by portions of the metal pad, with the portions of the metal pad interconnected to form a continuous metal region.

An electronic device is provided and includes a wiring structure including a conductive wiring and an insulating layer. The conductive wiring is disposed on a substrate and has a top side and two side walls opposite to each other. The insulating layer wraps around the conductive wiring at least through the top side and two side walls, wherein there is a gap between the insulating layer and at least one of the two side walls. The conductive wiring includes a first layer, a second layer and a third layer, the second layer is disposed between the first layer and the third layer, and the first layer is disposed between the second layer and the substrate. A thickness of the second layer is greater than a thickness of the first layer, and the thickness of the second layer is greater than a thickness of the third layer.

The disclosure relates to radio engineering and, for example, to the printed circuit board-integrated antenna of transmitting/receiving data. A printed circuit board-integrated antenna for transmitting/receiving data, the antenna comprises an intermediate section comprising patch elements interconnected by at least one via, wherein a first patch element is disposed in a lower middle layer and is separated by a gap from a conductive solid area, a second patch element is disposed in an upper middle layer and is separated by a gap from the conductive solid area; a parasitic patch element disposed in an upper layer and separated by a gap from the conductive solid area; and a strip line connected directly to an edge of the first patch element, the strip line being disposed in the lower middle layer and configured for communicating a data signal to or from the intermediate section when transmitting/receiving data. The disclosure provides a simplified antenna configuration, for the implementation of which the minimum number of layers is used in the printed circuit board. The complexity of manufacturing the disclosed antenna is significantly reduced.