An apparatus and method for reducing differential cross-talk in a pin arrangement of a socket are described. Socket pins within a differential pair use a modified shape to tighten the intra-pair pin coupling to reduce the crosstalk without changing the pin map. The middle vertical segment of one pin of a diagonally adjacent differential pin pair is modified to be closer to the other pin than other corresponding locations of the pins. The spring beam that extends from the middle vertical segment of the one pin is modified to accommodate the package landing pad that the spring beam contacts to maintain a uniform pitch.

A printed circuit board (PCB) system includes a first printed circuit board (PCB), an integrated circuit (IC) package, and a memory module. The IC package includes i) a package substrate, ii) a main IC chip that is electrically coupled to a top surface of the package substrate, iii) first contact structures that are disposed on a bottom surface of the package substrate and that are electrically coupled to the first PCB, and iv) second contact structures that are disposed on a top surface of the package substrate. The memory module includes i) a second PCB, ii) one or more memory IC chips that are disposed on the second PCB, and iii) third contact structures that are disposed on a bottom surface of the second PCB. An interposer electrically couples the second contact structures of the IC package with the third contact structures of the memory module.

Power amplifier systems including power amplifier modules (PAMs) and electromagnetic bandgap (EBG) isolation structures are disclosed. In embodiments, the power amplifier system includes a printed circuit board (PCB) and a PAM mounted to the PCB in an inverted orientation. The PCB has a PCB frontside on which a PAM mount region is provided, and radio frequency (RF) input and output bondpads. The PAM includes a topside input/output interface having RF input and output terminals electrically coupled to the RF input and output pads, respectively. The power amplifier system further includes a first EBG isolation structure containing a first grounded EBG cell array, at least a portion of which is located within or beneath the PAM mount region.

The invention provides an optical sensor package. The optical sensor package includes: a printed circuit board (PCB); a sensor disposed on the PCB; a glass cover disposed directly on the sensor; and an aperture disposed on the PCB comprised of a solid perimeter surrounding the sensor and a ceiling having a cut-out section above the glass cover. The cut-out section of the ceiling is smaller in area than the glass cover. The part of the aperture ceiling which overhangs the glass cover is thicker than the remaining part. The optical sensor package further includes an LED die disposed on the PCB, and Kapton tape placed over the ceiling of the aperture.

Techniques for low- or zero-misaligned vias are disclosed. In one embodiment, a high-photosensitivity, medium-photosensitivity, and low-photosensitivity layer are applied to a substrate and exposed at the same time with use of a multi-tone mask. After being developed, one layer forms a mold for a first via, one layer forms a mold for a conductive trace and a second via, and one layer forms an overhang over the position for the second via. The molds formed by the photosensitive layers are filled with copper and then etched. The overhang prevents the top of the copper infill below the overhang region from being etched. As such, the region under the overhang forms a pillar or column after etching, which can be used as a via. Other embodiments are disclosed.

A novel method and interface are provided to generalize power delivery (PD) solutions and allow OEMs and suppliers to easily replace PD solutions using the same design and layout without having to re-spin the motherboard. This is achieved by defining a new interface and ball-out which support dual port PD solution that meet the system requirements. The embodiments employ an interposer to unify different PD solutions. The interposer is part of a unique Land Grid Array (LGA) soldered down solution with pre-defined interface employing a generic pinout to support PD solutions for dual type-C ports from different vendors. The interposer includes an LGA having a pattern of pads that is coupled to a LGA on a platform PCB with a matching pattern.

Various embodiments disclosed relate to LiDAR systems. The present disclosure includes a method and assemblies for connection photonics modules to LiDAR systems. In an example, a connection assembly can include a system board, a flex printed circuit board (PCB) connected to the system board through an interface, a photonics integrated circuit die mounted on a first side of the flex PCB and an electronic integrated circuit die mounted on a second side of the flex PCB, opposite the first side.

Disclosed are a printed circuit board connector according to an embodiment and a module device including same. The printed circuit board connector comprises: a substrate; holes formed in the substrate at predetermined intervals and coated with a metal material on the inner circumferential surface thereof so as to form a metal layer; a first metal pad formed at one end of the holes and connected to the metal layer; and a second metal pad formed at the other end of the holes and connected to the metal layer.

A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the substrate is reduced by one or more non-conductive voids though the thickness of the conductive portion of the land pad. The voids may allow the contact area of the land pad, as defined by the perimeter of the land pad, to remain the same while reducing the conductive portion that overlaps the parallel ground plane. Capacitance between the land pad and the parallel ground plane is reduced by an amount proportional to the reduction in overlapping conductive area.

A surface mountable laser driver circuit package is configured to mount on a host printed circuit board (PCB). A surface mount circuit package includes a lead-frame. A plurality of laser driver circuit components is mounted on and in electrical communication with the lead-frame of the surface mount circuit package. A dielectric layer is located between the lead-frame and the host PCB and includes portals through the dielectric layer each arranged to accommodate an electrical connection between the lead-frame and the host PCB. The lead-frame and the dielectric layer are arranged such that a first lead-frame portion and a first dielectric layer portal align with a first end of a host PCB trace configured to provide a current return path for the surface mount laser driver, and a second lead-frame portion and a second dielectric layer portal align with a second end of the host PCB trace.