ESD suppressor and manufacturing method thereof. The ESD suppressor include at least two printed circuit boards, one insulating frame, two terminal electrodes and two or more interior electrodes. The insulating frame is positioned between the two printed circuit boards, so as to form a main structure with a cavity. For each printed circuit board, at least one interior electrode is positioned on the surface facing the cavity and separated from other interior electrode(s). Two terminal electrodes are positioned on two different surfaces of the main structure and electrically connected to different interior electrodes respectively. Optionally, the insulating frame is a hallowed out printed circuit board or a frame formed by printing insulating material. In the manufacturing method, the thickness of the insulating frame is adjusted to adjust the relative distance between different printed circuit boards, so as to further adjust the breakdown voltage of the ESD suppressor

A multilayer ceramic capacitor may include: ceramic body including a plurality of dielectric layers and a plurality of internal electrodes, external electrodes including a connecting portion and band portion, terminal electrodes including upper and lower horizontal portion and vertical portion connecting end portion of the upper and lower horizontal portion and the conductive adhesive layers disposed to the upper surface of the band portion and upper horizontal portion.

Solder material used in soldering of an Au electrode including Ni plating containing P includes Ag satisfying 0.3≦[Ag]≦4.0, Bi satisfying 0≦[Bi]≦1.0, and Cu satisfying 0<[Cu]≦1.2, where contents (mass %) of Ag, Bi, Cu and In in the solder material are denoted by [Ag], [Bi], [Cu], and [In], respectively. The solder material includes In in a range of 6.0≦[In]≦6.8 when [Cu] falls within a range of 0<[Cu]<0.5, In in a range of 5.2+(6−(1.55×[Cu]+4.428))≦[In]≦6.8 when [Cu] falls within a range of 0.5≦[Cu]≦1.0, In in a range of 5.2≦[In]≦6.8 when [Cu] falls within a range of 1.0<[Cu]≦1.2. A balance includes only not less than 87 mass % of Sn.

The printed circuit board for the memory card includes an insulating layer; a mounting unit formed on a first surface of the insulating layer and electrically connected to a memory device; a terminal unit formed on a second surface of the insulating layer and electrically connected to electronic apparatuses of an outside; and metal layers formed at the mounting unit and the terminal unit and made of the same material.

The invention relates to an electronic component. The electronic component 2 has an electrical assembly 3 having two electrical connections 4, 5 that are each formed on opposing faces of the assembly. For each connection 4, 5, the component has at least one electrically conductive connection element 9, 10 having a mounting foot 14, 15 for connection to a circuit carrier 22. According to the invention, the connection element 8, 9 has at least two metal layers 10, 11, 12, 13 at least on one section, wherein the metal layers are each formed from different metals and integrally connected to one another. Preferably, one metal layer 12, 13 from the metal layers has greater thermal conductivity than the other metal layer 10, 11.

An electrical component having partial bodies, a base on which the partial bodies are arranged, and at least one connection contact for electrically connecting the partial bodies to a carrier. A method for producing an electrical component having one or more partial bodies is also disclosed.

Disclosed is an electrode device for measuring an electric biosignal. The electrode device includes a flexible PCB (printed circuit board) having a flexible support layer and a trace layer on a first side. The trace layer includes at least two electrode pads for skin contacts and, for each electrode pad, a solder pad and a conducting trace forming a galvanic connection between the electrode and the solder pad. The flexible PCB further includes an opening defining a flexible, elongated cantilever in a central portion of the flexible PCB, having a base end connected to the central portion and a free end separated from the central portion. The solder pads are located at the free end. The electrode device further includes a connector component on the second side, soldered to the solder pads on the free end of the cantilever.

A circuit board assembly includes a circuit board, an electronic surface mount device (SMD), and a spacer that attaches the SMD to the circuit board. A coefficient of thermal expansion (CTE) of the spacer is closer to a CTE of the SMD than a CTE of the circuit board. The circuit board assembly also includes a flexible electrical lead that extends between and that is electrically connected to the SMD and the electrical node of the circuit board. Methods of manufacturing the circuit board assembly include selectively heating joining material at a predetermined heating rate and selectively cooling the joining material at a predetermined cooling rate to attach the flexible electrical leads to the SMD and the circuit board.

A circuit board assembly includes a circuit board, an electronic surface mount device (SMD), and a spacer that attaches the SMD to the circuit board. A coefficient of thermal expansion (CTE) of the spacer is closer to a CTE of the SMD than a CTE of the circuit board. The circuit board assembly also includes a flexible electrical lead that extends between and that is electrically connected to the SMD and the electrical node of the circuit board. Methods of manufacturing the circuit board assembly include selectively heating joining material at a predetermined heating rate and selectively cooling the joining material at a predetermined cooling rate to attach the flexible electrical leads to the SMD and the circuit board.

Embodiments disclosed herein include electronics packages and methods of forming such packages. In an embodiment, the electronics package comprises a first substrate and a plurality of first conductive pads on the first substrate. In an embodiment, the electronics package further comprises a second substrate and a plurality of second conductive pads on the second substrate. In an embodiment, the electronics package further comprises a plurality of interconnects between the first and second substrate. In an embodiment, each interconnect electrically couples one of the first conductive pads to one of the second conductive pads. In an embodiment, the interconnects comprise strands of conductive material that are woven on themselves to form a mesh-like structure.