Flexible electrical devices comprising electrode layers on softening polymers and methods of manufacturing such devices, including lift-off processes for forming electrodes on softening polymers, processes for forming devices with a patterned double softening polymer layer, and solder reflow processes for forming electrical contacts on softening polymers.

An electrical device, comprising a softening polymer layer, an electrode layer on a surface of the softening polymer layer and a cover polymer layer on the surface of the softening polymer layer. An opening in the polymer cover layer is filled with a reflowed solder, one end of the reflowed solder, located inside the opening, contacts a contact pad site portion of the electrode layer, and another end of the reflowed solder contacts an electrical connector electrode of the device.

[Object] Provided are a laminate film and an electrode substrate film with excellent etching quality, in which a circuit pattern formed by etching processing is less visible under highly bright illumination, and a method of manufacturing the same.

[Solving Means] A laminate film includes a transparent substrate 60 formed of a resin film and a layered film provided on at least one surface of the transparent substrate. The layered film includes metal absorption layers 61 and 63 as a first layer and metal layers (62, 65), (64, 66) as a second layer, counted from the transparent substrate side. The metal absorption layers are formed by a reactive sputtering method which uses a metal target made of Ni alone or an alloy containing two or more elements selected from Ni, Ti, Al, V, W, Ta, Si, Cr, Ag, Mo, and Cu, and a reactive gas containing oxygen. The reactive gas contains hydrogen.

A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.

A printed circuit board includes a substrate, and a wiring provided on the substrate. The wiring includes a copper-based metal wire provided on the substrate and a surface-treated layer provided on the copper-based metal wire. The copper-based metal wire includes mainly a copper. The surface-treated layer includes an amorphous layer including oxygen and a metal with a higher oxygen affinity than the copper.

An interposer for electrical connection between a CPU chip and a circuit board is provided. The interposer includes a board-shaped base substrate made of glass having a coefficient of thermal expansion ranging from 3.1×10.sup.−6/K to 3.4×10.sup.−6/K. The interposer further includes a number of holes having diameters ranging from 20 μm to 200 μm. The number of holes ranging from 10 to 10,000 per square centimeter. Conductive paths running on one surface of the board extend right into respective holes and therethrough to the other surface of the board in order to form connection points for the chip.

A component carrier includes a stack having a first electrically insulating layer structure and a first electrically conductive layer structure arranged on the first electrically insulating layer structure. The first electrically insulating layer structure has at least one first covered portion, which is covered by the first electrically conductive layer structure, and at least one first non-covered portion, which is not covered by the first electrically conductive layer structure. The first electrically insulating layer structure defines a recess at the at least one first non-covered portion.

A method for producing a joined structure according to the present invention includes: a reflow step of heating a first member and a solder material while keeping them in contact with each other in a reflow chamber to melt a solder alloy constituting the solder material, the reflow step including: a first reflow step of melting the solder alloy with an atmosphere in the reflow chamber reduced to a first pressure P.sub.1 lower than the atmospheric pressure; and a second reflow step of, after the first reflow step, melting the solder alloy with the atmosphere in the reflow chamber reduced to a second pressure P.sub.2 lower than the first pressure P.sub.1.

A method for protecting a substrate from corrosion, which method comprises in sequence: a first step including plasma polymerization of a precursor monomer and deposition of the resultant polymer onto at least one surface of a substrate; a second step including exposing the polymer to an inert gas in the presence of a plasma without further deposition of polymer onto the or each surface of the substrate; a third step including plasma polymerization of the precursor monomer used in the first step and deposition of the resultant polymer onto the polymer deposited in the first step so as to increase the thickness of the polymer; and optionally, a fourth step including exposing the polymer to an inert gas in the presence of a plasma without further deposition of polymer onto the or each surface of the substrate.

A component carrier includes a stack having a first electrically insulating layer structure and a first electrically conductive layer structure arranged on the first electrically insulating layer structure. The first electrically insulating layer structure has at least one first covered portion, which is covered by the first electrically conductive layer structure, and at least one first non-covered portion, which is not covered by the first electrically conductive layer structure. The first electrically insulating layer structure defines a recess at the at least one first non-covered portion.