A wiring circuit board includes a mounting region for mounting an electronic element and a circuit region surrounding the mounting region. The mounting region includes a terminal. The circuit region includes a circuit to be electrically connected to the terminal. The circuit region includes a metal support layer, a base insulating layer, and a conductive layer including the circuit. The mounting region does not include the metal support layer and includes a base insulating layer having an opening portion, and the conductive layer including the terminal. The terminal is disposed in the opening portion of the base insulating layer.

A method for introducing at least one cutout, in particular in the form of an aperture, into a sheetlike workpiece having a thickness of less than 3 mm, involving detecting a laser beam onto the surface of the workpiece, selecting the exposure time of the laser beam to be extremely short so that only a modification of the workpiece concentrically around a beam axis of the laser beam occurs, such a modified region having defects resulting in a chain of blisters, and, as a result of the action of a corrosive medium, anisotropically removing material by successive etching in those regions of the workpiece that are formed by the defects and have previously been modified by the laser beam, resulting, along the cylindrical zone of action, in producing a cutout as an aperture in the workpiece.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.

A resistor-embedded circuit board and a method for processing the resistor-embedded circuit board are provided by the present disclosure. By opening an embedded-resistor cavity on a substrate, embedding a resistor into the embedded-resistor cavity to acquire a circuit board containing a built-in resistor. By opening the embedded-resistor cavity, it is very easy to realize high-precision control of a shape and a thickness of an embedded resistor, and realize very high-precision resistor-embedding; and it is easy to realize high-precision and massive processing. In a resistor-embedded layer, a resistor is built in a substrate. Then, in a process of pressing, a crack and a relatively large deformation will not be caused after pressing due to an irregular surface of the resistor-embedded layer, thereby improving a reliability and a quality rate of the circuit board.

A method for manufacturing a circuit board with nickel resistor embedded therein provides a copper substrate, the copper substrate includes a copper foil. A nickel resistance layer is formed on the copper foil. A first dielectric layer and a first copper layer are formed on the nickel resistance layer. The copper foil and the first copper layer are etched to form a first conductive wiring layer and a second conductive wiring layer respectively, the nickel layer not being subjected to an etching process, to obtain the finished circuit board.

Various embodiments described herein provide for printed circuit boards with one or more spaces for embedding components, which can be used to implement a memory sub-system.

A process for making a circuit board modifies a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and resin-rich surface removal operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.

This application relates to the field of power supply packaging technologies, and in particular, to a PCB-pinout based packaged module, including a packaged module and a pin exposed outside the packaged module. The packaged module includes a PCB and a power component. The PCB has a first surface and a second surface that are disposed opposite to each other, and the power component is disposed on the first surface or the second surface of the PCB. The power component performs communication connection with a pin located on one side of the first surface or one side of the second surface of the PCB through surface-layer copper of the PCB. The pin located on one side of the first surface or one side of the second surface of the PCB is a surface-layer copper etching pattern that is located on the PCB and that is exposed outside the packaged module.

A method of manufacturing a printed circuit board includes forming an intermediate layer on a first conductive layer disposed on a first insulating layer, forming a second conductive layer and a second insulating layer on the intermediate layer, separating the first insulating layer from at least one portion of the first conductive layer, and etching the first conductive layer and the intermediate layer. After the etching, a surface of the second conductive layer protrudes further than a surface of the second insulating layer. The intermediate layer before the etching includes a portion overlapping the second conductive layer in a vertical direction and another portion not overlapping the second conductive layer in the vertical direction.

Various embodiments of a sealed package and a method of forming such package are disclosed. The package can include a non-conductive substrate that includes a cavity disposed in a first major surface. A cover layer can be disposed over the cavity and attached to the first major surface of the non-conductive substrate to form a sealed enclosure. The sealed package can also include a feedthrough that includes a via between a recessed surface of the cavity and a second major surface of the substrate, and a conductive material disposed in the via. An external contact can be disposed over the via on the second major surface of the non-conductive substrate, where the external contact is electrically connected to the conductive material disposed in the via. The sealed package can also include an electronic device disposed within the sealed enclosure that is electrically connected to the external contact.