The capillary transfer technology presented here represents a powerful approach to transfer soft films from surface of liquid onto a solid substrate in a fast and defect-free manner. The fundamental theoretical model and transfer criteria validated with comprehensive experiments and finite element analyses, for the first time provides a quantitative guide and optimization for the choice of material systems, operating conditions and environments for scalable on-demand transfers with high yield. The intrinsically moderate capillary transfer force and externally selectable transfer direction offer robust capabilities for achieving deterministic assembly and surface properties of structures with complex layouts and patterns for potentially broad applications in the fabrication of flexible/stretchable electronics, surface wetting structures and optical devices. Integration of this technology with other advanced manufacturing technologies associated with material self-assembly, growth and layout alignment represents promising future topics and would help create emerging new manufacturing technologies that leverage unique fluidity of liquid environments.

The casing of an electronic control device includes a casing-side contact surface in contact with the end of a printed-circuit board. A cover includes a cover-side contact surface holding the end of the printed-circuit board together with the casing-side contact surface by being in contact with the end of the printed-circuit board. In the printed-circuit board, a held portion held between the casing-side contact surface and the cover-side contact surface is provided with a through-hole via.

A method for manufacturing a circuit board, includes obtaining a second laminated body by laminating, in this order, an uncured second insulating substrate and a resin film on a second surface opposite to a first surface of a cured first insulating substrate of a first laminated body, and performing thermocompression bonding thereon. The first laminated body includes the first insulating substrate and a metal layer that is formed into a pattern shape on the first surface of the first insulating substrate. A third laminated body is obtained by forming a hole that reaches the metal layer, in the resin film, the second insulating substrate, and the first insulating substrate, from a resin film side of the second laminated body, filling conductive paste into the hole, and then peeling off the resin film. Thermocompression bonding is performed by stacking one third laminated body and another third laminated body.

A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.

A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.

A multilayer ceramic electronic component includes a ceramic body including dielectric layers and internal electrodes and having first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, and fifth and sixth surfaces opposing each other in a third direction, base electrode layers disposed on the ceramic body and including main portions connected to the internal electrodes and extension portions extending from the main portions, and resin electrode layers disposed on the base electrode layers while leaving end portions of the extension portions exposed. A width of the extension portion is narrower than a width of the outer surface of the ceramic body on which the extension portion is disposed, measured in a direction parallel to a width direction of the extension portion.

To provide more space for additional circuit elements (coils, capacitors) and/or to allow the accommodation of additional circuit elements required for shielding the circuits, the metallization regions are arranged one over the other in at least two metallization layers. The carrier body has a surface on which sintered metallization regions are arranged in a first metallization layer, said metallization regions carrying electronic components and/or being structured such that the metallization regions form resistors or coils. The metallization regions are covered, together with the components and/or the resistors or coils, by a ceramic plate, and optionally additional metallization regions are arranged in additional metallization layers on the ceramic plate and each metallization region is covered by a ceramic plate. Sintered metallization regions are arranged in a metallization layer for the purpose of accommodating circuit elements on the uppermost ceramic plate facing away from the cooling elements.

A molded ceramic layer of a multilayer cooling assembly back plate is described. The molded ceramic layer has an opening on a side of the molded ceramic layer that is to face a back side of a circuit board. The opening is aligned with a location of a back side component on the back side of the circuit board.

The method for manufacturing a number of electrical nodes, wherein the method includes providing a number of electronic circuits onto a first substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, wherein each one of the electronic circuits includes a circuit pattern and at least one electronics component in connection with the circuit pattern, wherein the electronic circuits are spaced from each other on the first substrate, thereby defining a blank area surrounding each one of the number of electronic circuits, respectively, and providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material, and, subsequently, hardening, optionally including curing, the potting or casting material to form a filler material layer of the number of electrical nodes.

A semiconductor package that includes a circuit board having an opening therein. The circuit board includes a first portion, and a second portion disposed below the first portion. The first portion protrudes further in a horizontal direction towards the opening than the second portion. A transparent substrate is disposed on the circuit board. An image sensor chip is mounted on the circuit board. The image sensor chip includes an active array region facing the transparent substrate. A connection terminal directly contacts a lower surface of the first portion of the circuit board and an upper surface of the image sensor chip. A gap-fill member covers the connection terminal and covers a portion of an upper surface of the image sensor chip and at least a portion of a lateral side surface of the image sensor chip. The transparent substrate has a greater horizontal width than the circuit board.