H05K3/02

Package device

A package device and a manufacturing method thereof are provided. The package device includes a redistribution layer including a first dielectric layer, a conductive layer, and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test mark, the test mark includes a plurality of conductive patterns formed of the conductive layer, and the conductive patterns are arranged in a ring shape.

Systems including a power device-embedded PCB directly joined with a cooling assembly and method of forming the same

Systems including power device embedded PCBs coupled to cooling devices and methods of forming the same are disclosed. One system includes a power device embedded PCB stack, a cooling assembly including a cold plate having one or more recesses therein, and a buffer cell disposed within each of the one or more recesses. The cooling assembly is bonded to the PCB stack with a insulation substrate disposed therebetween. The cooling assembly is arranged such that the buffer cell faces the PCB stack and absorbs stress generated at an interface of the PCB stack and the cooling assembly.

Composite metal foil and preparation method thereof
11582869 · 2023-02-14 · ·

A composite metal foil and a preparation method thereof are provided. The composite metal foil includes a carrier layer, a barrier layer, a striping layer, and a metal foil layer. The carrier layer, the barrier layer, the striping layer, and the metal foil layer are sequentially stacked, the barrier layer includes a metal bonding layer and a high-temperature resistant layer stacked, and the metal bonding layer is disposed between the carrier layer and the high-temperature resistant layer. The striping layer is disposed between the carrier layer and the metal foil layer so as to facilitate peeling of the carrier layer, and the barrier layer is disposed between the carrier layer and the metal foil layer so as to prevent the carrier layer and the metal foil layer from diffusing mutually to cause bonding at a high temperature, so that the carrier layer and the metal foil layer are easy to peel off. In addition, the metal bonding layer is disposed between the carrier layer and the high-temperature resistant layer, so that the barrier layer is not easy to separate from the carrier layer, and peeling between the barrier layer and the carrier layer is prevented.

Ground discontinuities for thermal isolation

A quantum mechanical circuit includes a substrate; a first electrical conductor and a second electrical conductor provided on the substrate and spaced apart to provide a gap therebetween; and a third electrical conductor to electrically connect the first electrical conductor and the second electrical conductor. The third electrical conductor is a poor thermal conductor.

Ground discontinuities for thermal isolation

A quantum mechanical circuit includes a substrate; a first electrical conductor and a second electrical conductor provided on the substrate and spaced apart to provide a gap therebetween; and a third electrical conductor to electrically connect the first electrical conductor and the second electrical conductor. The third electrical conductor is a poor thermal conductor.

SUBSTRATE PROVIDED WITH TRANSPARENT CONDUCTIVE FILM
20180007786 · 2018-01-04 ·

Provided is a transparent conductive film-equipped substrate that makes it difficult for an insulating film provided on a portion from which a transparent conductive film has been removed to peel off. The transparent conductive film-equipped substrate 10 includes a substrate 1 and a transparent conductive film 2 provided on the substrate 1 and subjected to patterning, wherein the transparent conductive film-equipped substrate is made up so that: a removal region A1 where the transparent conductive film 2 has been removed by patterning, a non-removal region A2 where the transparent conductive film is left unremoved, and a boundary region A3 provided between the removal region A1 and the non-removal region A2 are formed on the substrate 1; and the boundary region A3 is formed with insular portions 2b in which the transparent conductive film 2 is formed in insular shapes.

SUBSTRATE FOR PRINTED CIRCUIT BOARD, PRINTED CIRCUIT BOARD, AND METHOD FOR PRODUCING PRINTED CIRCUIT BOARD

A substrate for a printed circuit board according to an embodiment of the present invention includes a base film having insulating properties and a sintered layer formed of a plurality of metal particles, the sintered layer being stacked on at least one surface of the base film, in which a region of the sintered layer extending from an interface between the sintered layer and the base film to a position 500 nm or less from the interface has a porosity of 1% or more and 50% or less.

METHOD OF MANUFACTURING CONDUCTIVE PATTERN, TOUCH SENSOR, ELECTROMAGNETIC WAVE SHIELD, ANTENNA, WIRING BOARD, CONDUCTIVE HEATING ELEMENT, AND STRUCTURE
20230007784 · 2023-01-05 · ·

The present disclosure provides a method of manufacturing a conductive pattern and applications thereof, the method including: a step of preparing a laminate including a transparent substrate, a light shielding pattern that is formed on the transparent substrate, and a negative tone photosensitive resin layer that is disposed on the transparent substrate and the light shielding pattern and is in contact with the transparent substrate; a step of irradiating a surface of the transparent substrate opposite to a surface facing the light shielding pattern with light; a step of developing the negative tone photosensitive resin layer to form a resin pattern in a region defined by the transparent substrate and the light shielding pattern; and a step of forming a conductive pattern on the light shielding pattern.

Method for contacting and rewiring an electronic component embedded into a printed circuit board

A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed. A first permanent resist layer is applied to one contact side of the PCB. The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component. A second permanent resist layer is applied onto the structured first permanent resist layer. The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks. The exposures are chemically coated with copper the copper is electric-plated to the exposures. Excess copper in the areas between the exposures is removed.

Circuit forming method
11570900 · 2023-01-31 · ·

A circuit forming method, comprising: a coating step of applying a metal-containing liquid and a metal paste in an overlapping manner on a base, the metal-containing liquid containing fine metal particles and the metal paste containing a resin binder and metal particles larger than the fine metal particles in the metal-containing liquid; and a heating step of making the metal-containing liquid and the metal paste coated in the coating step conductive by heating the metal-containing liquid and the metal paste.