A PCB that constructs circuit traces, vias, and connection pads by filling recessed areas, grooves, holes, and/or counter bores with conductive material. The recessed areas are filled with conductive ink or plating solutions by a number of methods. Capillary action aids in the filling of the recessed areas. Pressure, vacuum and or gravity can aid the filling. Layers of the PCB or similar type devices can be bonded together both mechanically and electrically to accomplish 3D connections of circuits. Ground and power plane durability and conductivity is enhanced by the inclusion of small grooves over the conductive plane.

A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.

Provided is a wiring board including a fine-wire pattern made of cured conductive ink formed on a board surface, wherein assuming that two orthogonal directions on the board surface are directions X and Y, a line width of another fine wire that is included in the fine-wire pattern, passes through another point on the board surface not aligned in the direction X but aligned in the direction Y with one intersection where three or more fine wires included in the fine-wire pattern are centered at one spot, and does not form another intersection where three or more fine wires are centered at one spot at said another point is 1.5 times or more a minimum line width of the fine wires included in the fine-wire pattern.

A printed circuit board of an information handling system includes a dielectric layer, adjacent differential pairs, a ground layer, and a ground wall. The adjacent differential pairs are plated on the dielectric layer, and generate crosstalk between each other. The ground wall is in physical communication with and electrically coupled to the ground layer. The ground wall extends substantially perpendicular from the ground layer through the dielectric layer. A top surface of the ground wall is a specific height above a top surface of the adjacent different pairs. The ground wall suppresses the generated crosstalk based on the specific height and a width of the ground wall.

A wiring board includes a resin insulating layer having a component mounting surface, first connection pads formed on the component mounting surface of the resin insulating layer, second connection pads formed on the component mounting surface of the resin insulating layer such that the second connection pads are surrounding the first connection pads, and a protruding part including a metal material and formed on the component mounting surface of the resin insulating layer such that a portion of the protruding part is embedded in the resin insulating layer and that the protruding part is positioned between the first connection pads and the second connection pads and surrounding the first connection pads.

Embodiments disclosed herein include package substrates for electronic packaging applications. In an embodiment, a package substrate comprises a first glass layer, where the first glass layer comprises a first via through the first glass layer, and the first via has an hourglass shaped cross-section. The package substrate may further comprise a second glass layer over the first glass layer, where the second glass layer comprises a second via through the second glass layer, and where the second via has the hourglass shaped cross-section. In an embodiment, the first via is electrically coupled to the second via.

An electric component includes a printed circuit board with each of a pair of surfaces serving as a component mounting surface. The component mounting surface has a predetermined region on which electronic components are coated with a resin. A predetermined one of the electronic components in the region is not covered with the resin at a portion above a predetermined height from the component mounting surface.

A low temperature co-fired ceramic (LTCC) electronic device includes a template layer, a base layer and a conductor. The template layer and the base layer are ceramic layers. The template layer has an electrode pattern formed by a hollow groove. A depth of the hollow groove is between 10 μm and 120 μm, and a width of the hollow groove is above 80 μm. The base layer is closely overlapped with the template layer. An overlapping area range of the base layer and the template layer at least covers the electrode pattern. The conductor is filled in the hollow groove of the electrode pattern. A filling thickness of the conductor is above 10 μm.

Depicted embodiments are directed to an Application Specific Electronics Packaging (“ASEP”) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the “batch” processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A method of producing a multilayer printed circuit board includes a metallic conductor structure including providing a base substrate including a film or plate and having first and second substrate sides, which base substrate at least partly consists of an electrically non-conductive organic polymer material and wherein the first substrate side is covered with a cover metal layer, partially removing the cover metal layer while subdividing the first substrate side into at least one first partial area, in which the first substrate side is free of the cover metal layer, and into at least one second partial area, in which the first substrate side is covered with the cover metal layer, and causing a plasma to act on the first substrate side with the aid of which plasma the polymer material is removed in the at least one first partial area while forming at least one trench.