An electroless plating process that enables reduction in production costs and a two-layer plating film obtained by the process including an electroless plating process for forming a nickel plating film and a gold plating film in this order on a surface of a copper material by a electroless plating method. The electroless plating process includes a step of forming a nickel plating film containing boron by a reductive electroless nickel strike plating method, and a step of forming a gold plating film by a reductive electroless gold plating method. The two-layer plating film according to the present disclosure is formed by this process.

A PCB that constructs circuit traces, vias, and connection pads by filling recessed areas, grooves, holes, and/or counter bores with conductive material. The recessed areas are filled with conductive ink or plating solutions by a number of methods. Capillary action aids in the filling of the recessed areas. Pressure, vacuum and or gravity can aid the filling. Layers of the PCB or similar type devices can be bonded together both mechanically and electrically to accomplish 3D connections of circuits. Ground and power plane durability and conductivity is enhanced by the inclusion of small grooves over the conductive plane.

A circuit board with conductive wiring which is precisely shaped and sized includes a two-part conductive element, namely a first conductive wiring layer and a second conductive wiring layer, a first cover film and a second cover film. The first conductive wiring layer and the second conductive wiring layer are in direct contact to each other. A projection of the first conductive wiring layer and a projection of the second conductive wiring layer along a direction perpendicular to the circuit board overlap with each other. The first and the second cover films wrap the first and the second conductive wiring layers, respectively.

A substrate for a printed wiring board, the substrate includes a base film containing polyimide as a main component and a sinter layer disposed on at least a portion of a surface of the base film and containing copper nanoparticles. The base film contains a nitrogen atom bonded to a copper atom of the copper nanoparticles, an average number of the nitrogen atom bonded to the copper atom per unit area of the surface of the base film on which the sinter layer is disposed is 2.6×10.sup.18 atoms/m.sup.2 to 7.7×10.sup.18 atoms/m.sup.2, and the average number is an average number calculated for a measurement region estimated to have a thickness of 3 nm from a measurement value of the surface of the base film measured by X-ray photoelectron spectroscopy.

A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.

Techniques and mechanisms for providing anisotropic etching of a metallization layer of a substrate. In an embodiment, the metallization layer includes grains of a conductor, wherein a first average grain size and a second average grain size correspond, respectively, to a first sub-layer and a second sub-layer of the metallization layer. The first sub-layer and the second sub-layer each span at least 5% of a thickness of the metallization layer. A difference between the first average grain size and the second average grain size is at least 10% of the first average grain size. In another embodiment, a first condition of metallization processing contributes to grains of the first sub-layer being relatively large, wherein an alternative condition of metallization processing contributes to grains of the second sub-layer being relatively small. A grain size gradient across a thickness of the metallization layer facilitates etching processes being anisotropic.

A wiring circuit board includes a porous insulating layer, and a first conductive layer sequentially toward one side in the thickness direction. The first conductive layer includes a first signal wire and first ground wires. Each of the first ground wires is thicker than the first signal wire.

Described herein are ultra-thin nanocellulose flexible electronic device on which SU-8, an epoxy material which can become highly stressed upon UV exposure, is printed on desired areas. Upon UV exposure and then release from the surface it is anchored on, the nanocellulose device will spontaneously self-mold into a desired form due to stress differences between the SU-8 and the nanocellulose sheet. The flexible electronics can be manufactured using standard printed circuit board processing techniques, including electroless metallization and soldering of surface mount components.

Provided is a plating lamination technology for providing a highly adhesive inner layer of a printed circuit board. The plating lamination technology is effective in providing an electroless plated laminate, including a non-etched/low-roughness pretreated laminate or a low-roughness copper foil, and a printed circuit board including the plated laminate.

Provided is a method for producing a wired circuit board in which a first preparation step of preparing a first substrate having an insulating layer and a conductive layer disposed on one surface of the insulating layer; a second preparation step of preparing a second substrate having a metal layer; a bonding step of laminating the first substrate and the second substrate so that the conductive layer and the metal layer are in contact with each other, and metal-bonding the conductive layer and the metal layer; and a patterning step of forming a conductive pattern on the other surface of the insulating layer are carried out.