Patent classifications
H05K3/225
Automatic trimming of a PCB-based LC circuit
Apparatus and methods of automatically trimming a PCB-based LC circuit. The apparatus may comprise an interface to a printed circuit board (PCB). The PCB may include a PCB inductor and a PCB capacitor to form an LC circuit. The LC circuit may have an LC circuit frequency. The apparatus may comprise a variable capacitor communicatively coupled to the interface and configured to adjust an effective capacitance of the LC circuit.
SHORT OR NEAR SHORT ETCH REWORK
Embodiments are directed to short and/or near short etch rework. A microfluidic device is positioned on a portion of a circuit having a defect. The microfluidic device is caused to dispense etchant that removes the defect of the circuit, where a flow of the etchant is controlled to access the portion of the circuit having the defect to thereby etch away the defect, the flow of the etchant being obstructed from accessing other portions of the circuit. The microfluidic device is used to extract the etchant from the portion of the circuit such that the etchant avoids contact with the other portions of the circuit. The microfluidic device is removed from the circuit.
COMPLIANT PIN SURFACE MOUNT TECHNOLOGY PAD FOR REWORK
Aspects of the invention include a press-fit pin for mechanically and electrically connecting to a through-hole of a substrate. The press-fit pin can include a press-fit portion configured to be deformed upon insertion into the through-hole against a plated surface of the through-hole. A surface mount technology (SMT) pad can be coupled to a first end of the press-fit portion. The SMT pad can include a conductive material. The press-fit pin can further include a trace extension coupled to the SMT pad. The trace extension can extend from the SMT pad in a direction perpendicular to the press-fit portion. The press-fit pin can include a tip portion coupled to a second end of the press-fit portion.
PROCESS FOR LOCALIZED REPAIR OF GRAPHENE-COATED LAMINATION STACKS AND PRINTED CIRCUIT BOARDS
Processes for localized lasering of a lamination stack and graphene-coated printed circuit board (PCB) are disclosed. An example PCB may include a lamination stack, post-lamination, that may further include a core, an adhesive layer, and at least one graphene-metal structure. A top layer of graphene of the graphene-metal structure may have never been grown before the lamination process or may have been removed post-lamination such that a portion of the top layer of graphene is missing. The localized lasering process described herein may grow (for the first time) or re-grow the graphene layer of the exposed portion of the metal layer without adverse effects to the rest of the lamination stack or PCB and while promoting a uniform layer of graphene on the top surface. A process of growing graphene through application of molecular layer and a self-assembled monolayer (SAM), are also described herein.
Automatic Trimming of a PCB-Based LC Circuit
Apparatus and methods of automatically trimming a PCB-based LC circuit. The apparatus may comprise an interface to a printed circuit board (PCB). The PCB may include a PCB inductor and a PCB capacitor to form an LC circuit. The LC circuit may have an LC circuit frequency. The apparatus may comprise a variable capacitor communicatively coupled to the interface and configured to adjust an effective capacitance of the LC circuit.
BOARD UNIT AND SEMICONDUCTOR DEVICE
A board unit according to an embodiment includes a circuit board, a semiconductor device, and a wire. The semiconductor device has a bottom surface facing the circuit board. The semiconductor device includes a plurality of bonding members between the circuit board and the bottom surface. The wire is disposed between the circuit board and the bottom surface. The bonding members have a first row and a second row. Two or more bonding members align in the first row in a first direction. Two or more bonding members align in the second row in the first direction. The second row is apart from the first row in a second direction intersecting with the first direction. The wire includes a first portion disposed between the first row and the second row, and the wire has a strength higher than that of one of the bonding members.
SUBSTRATE, MAINTENANCE METHOD AND DISPLAY DEVICE
The present disclosure provides a substrate, a maintenance method thereof and a display device. The substrate includes a base substrate, the base substrate is provided with at least one conductive pattern, and at least one of the at least one conductive pattern is interrupted and divided into a first conductive sub-pattern and a second conductive sub-pattern. The maintenance method includes: coating a conductive material in an interruption region in such a manner as to cover both the first conductive sub-pattern and the second conductive sub-pattern; and coating an organic insulation material at a side of the conductive material away from the base substrate, and curing the organic insulation material to form an organic protection film covering the conductive material.
ADAPTABLE LENS ASSEMBLY
Adaptable lens assemblies, optoelectronic components, and associated methods of manufacturing are provided. An example optoelectronic component includes a printed circuit board (PCB) and an adaptable lens assembly. The adaptable lens assembly includes a lens packaging structure supporting an optical lens at a focal distance and a lens support structure. The lens support structure defines a first side configured to support the lens packaging structure and maintain the focal distance and a second side removably attached to the PCB. The attachment between the second side of the lens support structure and the PCB is configured to enable selective attachment and detachment of the lens support structure and lens packaging structure supported thereon without causing damage to the PCB.
ELECTRONIC DEVICE
An electronic device with an active region comprising a substrate; a first conducting layer, disposed on the substrate, comprising a first pad in the active region; a second conducting layer, disposed on the first conducting layer, comprising a second pad in the active region; a first electronic component, disposed on the first pad, and electronically connected to the first pad; and a second electronic component, disposed on the second pad, and electronically connected to the second pad.
Interposer and electronic package
Embodiments include interposers for use in high speed applications. In an embodiment, the interposer comprises an interposer substrate, and an array of pads on a first surface of the interposer substrate. In an embodiment, a plurality of vias pass through the interposer substrate, where each via is electrically coupled to one of the pads in the array of pads. In an embodiment a plurality of heating elements are embedded in the interposer substrate. In an embodiment a first cable is over the first surface interposer substrate. In an embodiment, the first cable comprises an array of conductive lines along the first cable, where conductive lines proximate to a first end of the cable are electrically coupled to pads in the array of pads.