A lead-free solder ball is provided which suppresses interfacial peeling in a bonding interface of a solder ball, fusion defects which develop between the solder ball and solder paste, and which can be used both with Ni electrodes plated with Au or the like and Cu electrodes having a water-soluble preflux applied atop Cu. The lead-free solder ball for electrodes of BGAs or CSPs consists of 1.6-2.9 mass % of Ag, 0.7-0.8 mass % of Cu, 0.05-0.08 mass % of Ni, and a remainder of Sn. It has excellent resistance to thermal fatigue and to drop impacts regardless of the type of electrodes of a printed circuit board to which it is bonded, which are Cu electrodes or Ni electrodes having Au plating or Au/Pd plating as surface treatment.

An electronic device having at least one circuit board. The circuit board has a predetermined pattern of solder bumps facilitating a ground connection with a first enclosure member and/or a second enclosure member. The at least one circuit board is sandwiched between the first and second enclosure members, each of the first and second enclosure members has a surface facing the circuit board and the surface facing the circuit board has a bead extending therefrom contacting the predetermined pattern of solder bumps to complete the ground connection.

A method for step-soldering includes applying a first solder alloy having a melting point in a temperature range from 160 to 210° C. to a jointed portion of a first electronic component and a substrate, and heating them in the temperature range from 160 to 210° C., and applying a second solder alloy having the melting point in a temperature range lower than 160° C. to a joint portion of a second electronic component and the substrate, and heating them in the temperature range lower than 160° C. The first solder alloy consists of 13-22 mass % of In, 0.5-2.8 mass % of Ag, 0.5-5.0 mass % of Bi, 0.002-0.05 mass % of Ni and a balance Sn.

According to an embodiment, an electronic device may include a first printed circuit board (PCB), a second PCB having a shape corresponding to the first PCB, and an interposer surrounding a space between the first PCB and the second PCB and including multiple pads, wherein the interposer may include a first surface in contact with the first PCB, a second surface in contact with the second PCB, a first lateral surface facing the space, and a second lateral surface opposite to the first lateral surface, and a first point exposed through the second lateral surface, a second point exposed through one of the first lateral surface or the second lateral surface, and a heat conduction pattern disposed on the first surface in an area between the multiple pads to connect the first point and the second point.

Some implementations of the disclosure describe a solder paste consisting essentially of: 10 wt % to 90 wt % of a first solder alloy powder, the first solder alloy powder consisting of a Sn—Sb alloy, a Sn—Ag—Cu—Sb alloy, a Sn—Ag—Cu—Sb—In alloy, a Sn—Ag—Cu—Sb—Bi alloy, or Sn—Ag—Cu—Sb—Bi—In alloy; 10 wt % to 90 wt % of a second solder alloy powder, the second solder alloy powder consisting of an Sn—Ag—Cu alloy or Sn—Ag—Cu—Bi alloy, and the second solder alloy powder having a lower solidus temperature than the first solder alloy powder; and flux.

A method for forming a silicon carbide module integrated structure includes a heat sink and a silicon carbide module, which is fixedly connected with the heat sink. The solder paste is arranged between the heat sink and the silicon carbide module, and the heat sink and the silicon carbide module are hot pressed through a welding process to weld the silicon carbide module and the heat sink together.

The present disclosure is directed to a hybrid conductive ink including: silver nanoparticles and eutectic low melting point alloy particles, wherein a weight ratio of the eutectic low melting point alloy particles and the silver nanoparticles ranges from 1:20 to 1:5. Also provided herein are methods of forming an interconnect including a) depositing a hybrid conductive ink on a conductive element positioned on a substrate, wherein the hybrid conductive ink comprises silver nanoparticles and eutectic low melting point alloy particles, the eutectic low melting point alloy particles and the silver nanoparticles being in a weight ratio from about 1:20 to about 1:5; b) placing an electronic component onto the hybrid conductive ink; c) heating the substrate, conductive element, hybrid conductive ink and electronic component to a temperature sufficient i) to anneal the silver nanoparticles in the hybrid conductive ink and ii) to melt the low melting point eutectic alloy particles, wherein the melted low melting point eutectic alloy flows to occupy spaces between the annealed silver nanoparticles, d) allowing the melted low melting point eutectic alloy of the hybrid conductive ink to harden and fuse to the electronic component and the conductive element, thereby forming an interconnect. Electrical circuits including conductive traces and, optionally, interconnects formed with the hybrid conductive ink are also provided.

A flexible printed circuit and a manufacturing method thereof, an electronic device module and an electronic device are provided. The flexible printed circuit includes a main sub-circuit board and a bridge sub-circuit board; the main sub-circuit board includes a first substrate, and a first bridge end, a second bridge end, a first wiring portion, and a second wiring portion on the first substrate, the first wiring portion and the second wiring portion are spaced apart from each other and are electrically connected to the first bridge end and the second bridge end, respectively; the bridge sub-circuit board includes a second substrate, and a third bridge end, a fourth bridge end, and a third wiring portion for a first functional wiring line on the second substrate, the third bridge end and the fourth bridge end are electrically connected by the third wiring portion, the first substrate and the second substrate are not in direct contact, and the bridge sub-circuit board is configured to be mounted on the main sub-circuit board by electrically connecting the third bridge end and the fourth bridge end to the first bridge end and the second bridge end, respectively. The wiring layout of the flexible printed circuit is simple and is easy to be manufactured.

In examples, a method of manufacturing a semiconductor package comprises providing an array of unsingulated semiconductor packages, the array having a bottom surface and a conductive terminal exposed to the bottom surface, the conductive terminal including a slot configured to receive solder material. The method includes coupling a tape to the array of unsingulated semiconductor packages and applying a first saw blade to the bottom surface of the array to partially saw through a thickness of the array to a depth between two individual, adjacent, unsingulated semiconductor packages in the array of unsingulated semiconductor packages, the first saw blade producing a kerf. The method includes applying a second saw blade into the kerf to fully saw through the thickness of the array and produce a singulated semiconductor package, a width of the second saw blade narrower than the first saw blade. The conductive terminal is exposed to a side surface of the singulated semiconductor package, the side surface including a recessed area having a horizontal depth of no more than 30 microns.

A bonding sheet (X) of the present invention includes a matrix resin, a plurality of solder particles, and a plurality of flux particles, and has a sheet thickness T. In the bonding sheet (X), a particle size D.sub.50 of the solder particles is 12 μm or less, a particle size D.sub.50 of the flux particles is 30 μm or less, and a ratio of a particle size D.sub.90 of the solder particles and a particle size D.sub.90 of the flux particles to the sheet thickness T is 0.95 or less.