To provide a manufacturing method of a laminate body, including: a step of forming onto a supporting body a curable resin composition layer formed from a thermosetting resin composition to obtain a curable resin composition layer with a supporting body; a step of laminating the curable resin composition onto a substrate on a curable resin composition layer forming surface side to obtain a pre-cured composite with a supporting body formed from a substrate and a curable resin composition layer with a supporting body; a step of performing a first heating of the pre-cured composite and thermally curing the curable resin composition layer to obtain a cured composite with a supporting body formed from a substrate and a cured resin layer with a supporting body; a step of performing hole punching from the supporting body side of the cured composite with a supporting body to form a via hole in the cured resin layer; step of removing resin residue in the via hole of the cured composite with a supporting body; a step of peeling the supporting body from the cured composite with a supporting body to obtain a cured composite formed from a substrate and a cured resin layer, and a step of forming a dry plated conductor layer by dry plating on an inner wall surface of the via hole of the cured composite and on the cured resin layer.

Method for electroplating a metal onto a flat substrate P. Surfaces are electrically polarized for metal deposition by feeding thereto at least one first and second forward-reverse pulse current sequences. The first forward-reverse pulse current sequence includes a first forward pulse generating a first cathodic current during a first forward pulse duration t.sub.f1 and having a first forward pulse peak current i.sub.f1, and a first reverse pulse generating a first anodic current during a first reverse pulse duration t.sub.r1 and having a first reverse pulse peak current i.sub.r1, the second forward-reverse pulse current sequence including a second forward pulse generating a second cathodic current during a second forward pulse duration t.sub.f2 and having a second forward pulse peak current i.sub.f2, and a second reverse pulse generating a second anodic current during a second reverse pulse duration t.sub.r2, the second reverse pulse having a second reverse pulse peak current i.sub.r2.

A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.

A printed circuit board (PCB) having an engineered thermal path and a method of manufacturing are disclosed herein. In one aspect, the PCB includes complementary cavities formed on opposite sides of the PCB. The complementary cavities are in a thermal communication and/or an electrical communication to form the engineered thermal path and each cavity is filled with a thermally conductive material to provide a thermal pathway for circuits and components of the PCB. The method of manufacturing may further include drilling and/or milling each cavity, panel plating the cavities and filling the cavities with a suitable filling material.

A drive backboard includes: a first conductive layer including bonding pins and first connecting lines, an insulating layer including first via holes and second via holes, a second conductive layer including connecting electrodes and second connecting lines and a conductive protective layer including first protective structures and second protective structures. The first via hole exposes the bonding pin, one end of a first connecting line electrically connects a bonding pin, and the other end reaches the second via hole. One end of a second connecting line electrically connects a connecting electrode, and the other end electrically connects the first connecting line through the second via hole. The first protective structure covers the bonding pin, and the second protective structure covers the second connecting line formed at the position of the second via hole. The pattern of the conductive protective layer is complementary to the pattern of the insulating layer.

A thin film board according to the present invention has a structure in which a land, which is a connection portion with a transmission line of a printed circuit board, is used as a back wiring and extends from the end to the inside of the thin film board, and the back wiring and the front wiring are connected by a through hole. In the structure of this thin film board, the land does not become a stub and does not affect the high frequency characteristics of the circuit element. That is, there is no trade-off between the connectivity between the printed circuit board and the thin film board and the high frequency characteristics of the circuit element. Therefore, the thin film board and the circuit element in which the thin film board is mounted on the printed circuit board can support high frequency electric signals up to 60 GHz.

A method of making leak tight electrical connections through the wall of a ceramic package, for example a ceramic package used on an image intensifier tube. The method comprises a hole metallisation step (500) to obtain vias, the metallisation step comprising the deposition of a bond layer (510), a diffusion barrier (520) acting as a metallic base layer and a wetting agent (530). For each via, a filler metal preform made of indium or a eutectic chosen from among InSn, AuSn, AuGe, AgSn is deposited (540) on each orifice and is heated to a temperature higher than its melting temperature (550) such that the molten filler metal closes off the via to make it leak tight.

A method for producing a wired circuit board, the method including the steps of: a first step of providing an insulating layer having an opening penetrating in the thickness direction at one side surface in the thickness direction of the metal plate, a second step of providing a first barrier layer at one side surface in the thickness direction of the metal plate exposed from the opening by plating, a third step of providing a second barrier layer continuously at one side in the thickness direction of the first barrier layer and an inner surface of the insulating layer facing the opening, a fourth step of providing a conductor layer so as to contact the second barrier layer, and a fifth step of removing the metal plate by etching.

Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.

A circuit board includes a substrate, a first magnetic structure, a first dielectric layer and an inductive coil. The substrate has a top surface and a bottom surface. The first magnetic structure is disposed on the top surface of the substrate. The first dielectric layer covers the substrate and the first magnetic structure. The inductive coil includes a first interconnect, a second interconnect and a plurality of conductive pillars. The first interconnect is disposed on the first dielectric layer. The second interconnect is disposed on the bottom surface of the substrate. The conductive pillars connect the first interconnect and the second interconnect. The first interconnect, the second interconnect and the conductive pillars form a helical structure surrounding the first magnetic structure.