A wiring board includes a base material, a through hole that is formed in the base material, a magnetic member that is embedded in the through hole, and a plating film that covers end faces of the magnetic member exposed from the through hole. The magnetic member includes a conductor wire that is covered by a magnetic body. A wiring board manufacturing method includes forming a through hole in a base material, forming a magnetic member by covering a conductor wire by a magnetic body, embedding the magnetic member in the through hole, and forming a plating film that covers end faces of the magnetic member exposed from the through hole.

A rigid-flex board is manufactured by attaching multiple self-adhesive copper foil films to a flexible circuit board through multiple build-up processes, thereby eliminating the need to pre-fabricate a rigid board and slot the rigid board. The build-up processes of the self-adhesive copper foil films allow the resulting rigid boards to be highly uniform in thickness so that thickness deviation of the rigid-flex board can be reduced.

A component carrier with a stack including an electrically insulating layer structure and an electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm. A demarcation surface of the plating layer in the blind hole and facing away from the stack extends laterally outwardly from the bottom of the blind hole towards a lateral indentation and extends laterally inwardly from the indentation up to an outer end of the blind hole. An electrically conductive structure fills at least part of a volume between the plating layer and an exterior of the blind hole.

A microwave dielectric component (100) comprises a microwave dielectric substrate (101) and a metal layer, the metal layer being bonded to a surface of the microwave dielectric substrate (101). The metal layer comprises a conductive seed layer and a metal thickening layer (105). The conductive seed layer comprises an ion implantation layer (103) implanted into the surface of the microwave dielectric substrate (101) and a plasma deposition layer (104) adhered on the ion implantation layer (103). The metal thickening layer (105) is adhered on the plasma deposition layer (104). A manufacturing method of the microwave dielectric component (100) is further disclosed.

Embodiments may include inductors with embedded magnetic cores and methods of making such inductors. In an embodiment, an integrated circuit package may include an integrated circuit die with a multi-phase voltage regulator electrically coupled to the integrated circuit die. In such embodiments, the multi-phase voltage regulator may include a substrate core and a plurality of inductors. The inductors may include a conductive through-hole disposed through the substrate core and a plugging layer comprising a dielectric material surrounding the conductive through-hole. In an embodiment, a magnetic sheath is formed around the plugging layer. In an embodiment, the magnetic sheath is separated from the plated through hole by the plugging layer. Additionally, a first layer comprising a dielectric material may be disposed over a first surface of the magnetic sheath, and a second layer comprising a dielectric material may be disposed over a second surface of the magnetic sheath.

A printed circuit board includes: a first insulating layer; a first metal layer disposed on one surface of the first insulating layer; a second metal layer disposed on the other surface facing the one surface of the first insulating layer; a via penetrating through the first insulating layer to connect the first and second metal layers to each other; and a heterogeneous metal region disposed in at least one of an area in which the via is adjacent to the first insulating layer and an area in which the via is adjacent to the first metal layer, and including a material different from that of the via, wherein the heterogeneous metal region includes at least one of nickel (Ni), silicon (Si), and titanium (Ti).

A wiring board includes: an insulating layer; and a connection terminal formed on the insulating layer. The connection terminal includes a first metal layer laminated on the insulating layer, a second metal layer laminated on the first metal layer, a metal pad laminated on the second metal layer, and a surface treatment layer that covers an upper surface and a side surface of the pad and that is in contact with the upper surface of the insulating layer. An end portion of the second metal layer is in contact with the surface treatment layer, and an end portion of the first metal layer is positioned closer to a center side of the pad than the end portion of the second metal layer is to form a gap between the end portion of the first metal layer and the surface treatment layer.

A component carrier with an electrically insulating layer having a front side and a back side, a first and a second electrically conductive layer covering the front side and the back side of the electrically insulating layer, respectively. A through hole extends through both electrically conductive layers and the electrically insulating layer. An overhang is formed along one of the electrically conductive layers and sidewalls of the electrically insulating layer structure delimiting the through hole. An annular plating layer covers the sidewalls and fills part of the overhang such that a horizontal extension of the overhang after plating is less than 20 μm and/or such that a ratio between a horizontal extension of the overhang after plating and a width of a first window through the first electrically conductive layer and/or a width of a second window through the second electrically conductive layer is smaller than 20%.

A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.

A component carrier includes an electrically insulating layer structure having a first main surface and a second main surface with a through hole extending through the electrically insulating layer structure between the first main surface and the second main surface. An electrically conductive bridge structure connects opposing sidewalls of the electrically insulating layer structure delimiting the through hole. A vertical thickness of the electrically insulating layer structure is not more than 200 μm and a narrowest vertical thickness of the bridge structure is at least 20 μm.