A printed circuit board includes a first insulating layer having a through hole, and a via disposed to fill the through hole and to be extended to at least one surface of the first insulating layer, wherein the via includes a plating layer having an inner wall part disposed on an inner wall of the through hole and a land part extended from the inner wall part and disposed on the at least one surface of the first insulating layer, and a metal paste layer including metal particles, and filled in the rest of the through hole and disposed on the plating layer.

A wiring board includes a base material, a through hole that is formed in the base material, a magnetic member that is embedded in the through hole, and a plating film that covers end faces of the magnetic member exposed from the through hole. The magnetic member includes a conductor wire that is covered by a magnetic body. A wiring board manufacturing method includes forming a through hole in a base material, forming a magnetic member by covering a conductor wire by a magnetic body, embedding the magnetic member in the through hole, and forming a plating film that covers end faces of the magnetic member exposed from the through hole.

A semiconductor package according to an embodiment includes a first insulating layer including a through hole; an insulating member disposed in the through hole of the first insulating layer; a first electrode layer disposed on the insulating member; a second insulating layer disposed on the first electrode layer; and a first through electrode passing through the second insulating layer, wherein the first through electrode overlaps the first electrode layer and the insulating member in a vertical direction.

A component carrier with a stack including an electrically insulating layer structure and an electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm. A demarcation surface of the plating layer in the blind hole and facing away from the stack extends laterally outwardly from the bottom of the blind hole towards a lateral indentation and extends laterally inwardly from the indentation up to an outer end of the blind hole. An electrically conductive structure fills at least part of a volume between the plating layer and an exterior of the blind hole.

The present disclosure provides a foldable support, and a display device. The foldable support includes at least two metal layers, where at least one of the at least two metal layers is provided with a plurality of recessed portions at the at least one bending region; and a buffer structure located at at least one of the following positions: a position between two adjacent metal layers and a position in a plurality of the recessed portions of the at least one of the at least two metal layers.

A component carrier with an electrically insulating layer structure has opposed main surfaces, a through-hole, and an electrically conductive bridge structure connecting opposing sidewalls delimiting the through-hole. The sidewalls have a first tapering portion extending from a first main surface and a second tapering portion extending from a second main surface. A first demarcation surface faces the first main surface and a second demarcation surface faces the second main surface. A central bridge plane extends parallel to the first main surface and the second main surface and is at a vertical center between a lowermost point of the first demarcation surface and an uppermost point of the second demarcation surface. A first intersection point is between the central bridge plane and one of the sidewalls delimiting the through hole. A length of a shortest distance from the first intersection point to the first demarcation surface is at least 8 μm.

A printed circuit board according to an embodiment includes: an insulating layer including a via hole; and a via disposed in the via hole of the insulating layer, wherein the via includes; a connection portion disposed in the via hole of the insulating layer; a first pad disposed on an upper surface of the insulating layer and an upper surface of the connection portion; and a second pad disposed under a lower surface of the insulating layer and a lower surface of the connection portion, wherein the upper surface of the connection portion has a concave shape in a downward direction, the lower surface of the connection portion has a concave shape in an upward direction, a lower surface of the first pad has a convex shape corresponding to the upper surface of the connection portion, and an upper surface of the second pad has a convex shape corresponding to the lower surface of the connection portion.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.

The main technical problem solved by the present disclosure is to provide a circuit board preparation method. The method includes: obtaining a to-be-processed plate comprising an insulating layer, a first copper layer, a second copper layer opposite to the first copper layer, a blind metalized hole, and a first tab facing the blind metalized hole; obtaining a white insulating material; laminating the white insulating material to a surface of the insulating layer, a surface of the first copper layer, a surface of the first tab, and a surface of the second copper layer to form a first white insulating medium layer and a second white insulating medium layer opposite to the first while insulating medium layer; and performing surface polishing for the first white insulating medium layer and grinding the first white insulating medium layer until the first tab is exposed to form a first white reflective layer.

A component carrier with an electrically insulating layer having a front side and a back side, a first and a second electrically conductive layer covering the front side and the back side of the electrically insulating layer, respectively. A through hole extends through both electrically conductive layers and the electrically insulating layer. An overhang is formed along one of the electrically conductive layers and sidewalls of the electrically insulating layer structure delimiting the through hole. An annular plating layer covers the sidewalls and fills part of the overhang such that a horizontal extension of the overhang after plating is less than 20 μm and/or such that a ratio between a horizontal extension of the overhang after plating and a width of a first window through the first electrically conductive layer and/or a width of a second window through the second electrically conductive layer is smaller than 20%.