H05K3/4602

Protection Structure for an Aperture for an Optical Component Embedded Within a Component Carrier
20230038270 · 2023-02-09 ·

A component carrier including (a) a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure; (b) an optical component embedded within the stack, wherein the optical component comprises an optically active portion; (c) an opening formed within the stack, wherein the optical component and the opening are spatially arranged and configured such that an optical communication between the optically active portion and an exterior of the stack is enabled; and (d) a protection structure extending at least partially around the optically active portion and/or the opening. The protection structure protects the optically active portion from a resin flow during an embedding of the optical component in the stack. A method for manufacturing such a component carrier.

Printed circuit board

A printed circuit board includes a first insulating layer having a through hole, and a via disposed to fill the through hole and to be extended to at least one surface of the first insulating layer, wherein the via includes a plating layer having an inner wall part disposed on an inner wall of the through hole and a land part extended from the inner wall part and disposed on the at least one surface of the first insulating layer, and a metal paste layer including metal particles, and filled in the rest of the through hole and disposed on the plating layer.

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
20230008582 · 2023-01-12 · ·

A wiring substrate includes an insulating layer including resin and filler particles, and an embedded wiring layer including wirings and embedded in the insulating layer such that the wirings are filling grooves formed on a surface of the insulating layer, respectively. The embedded wiring layer is formed such that the inter-wiring distance between the closest two wirings of the wirings in the embedded wiring layer is in the range of 2 μm to 8 μm, and the insulating layer is formed such that the maximum particle size of the filler particles is 50% or less of the inter-wiring distance.

WIRING BOARD AND WIRING BOARD MANUFACTURING METHOD
20230009751 · 2023-01-12 ·

A wiring board includes a base material, a through hole that is formed in the base material, a magnetic member that is embedded in the through hole, and a plating film that covers end faces of the magnetic member exposed from the through hole. The magnetic member includes a conductor wire that is covered by a magnetic body. A wiring board manufacturing method includes forming a through hole in a base material, forming a magnetic member by covering a conductor wire by a magnetic body, embedding the magnetic member in the through hole, and forming a plating film that covers end faces of the magnetic member exposed from the through hole.

Method for manufacturing an electronic module and electronic module
11716816 · 2023-08-01 · ·

This publication discloses an electronic module, comprising a first conductive pattern layer and a first insulating-material layer on at least one surface of the first conductive pattern layer, at least one opening in the first insulating-material layer that extends through the first insulating-material layer, a component having a contact surface with contact terminals, the component being arranged at least partially within the opening with its contact terminals electrically coupled to the first conductive pattern layer, a second insulating-material layer provided on the first insulating-material layer, and a conductive pattern embedded between the first and second insulating material layers. This publication additionally discloses a method for manufacturing an electronic module.

Multilayer circuit board

The present disclosure discloses a multilayer circuit board comprising a plurality of metal layers, a blind via and/or a buried via, the multilayer circuit board is capable of transmitting signal between the different metal layers. The blind via has a pad on a non-opening side of the blind via. An upper or lower layer metal layer on the non-opening side of the blind via adjacent to the blind via has a first hole which is located in a position corresponding to the pad on the non-opening side of the blind via in a depth direction of the blind via; and/or an upper and/or lower layer adjacent to the buried via has a second hole which is located in a position corresponding to the pad of an upper and/or lower orifice of the buried via in a depth direction of the buried via.

Composite wiring substrate and semiconductor device

A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.

COMPONENT BUILT-IN SUBSTRATE
20230223197 · 2023-07-13 ·

A component built-in substrate includes a multilayer body and a substrate including a multilayer ceramic electronic component embedded therein. The multilayer ceramic electronic component includes a first connection portion that protrudes from the first external electrode, and a second connection portion that protrudes from the second external electrode. The substrate includes a core material. The multilayer ceramic electronic component including the first connection portion and the second connection portion includes a surface covered by the core material and embedded in the substrate. The first connection portion protrudes toward a surface of the substrate, and is not exposed at the surface of the substrate. The second connection portion protrudes toward the surface of the substrate, and is not exposed at the surface of the substrate.

Method for manufacturing the same

A circuit board with reduced dielectric losses enabling the movement of high frequency signals includes an inner circuit board and two outer circuit boards. The inner circuit board includes a first conductor layer and a first substrate layer. The first conductor layer includes a signal line and two ground lines on both sides of the signal line. The first substrate layer covers a side of the first conductor layer and defines first through holes which expose the signal line. Each outer circuit board includes a second substrate layer and a second conductor layer. The second substrate layer abuts the inner circuit board and defines second through holes which are not aligned with the first through holes, partially surrounding the signal line with air which has a very low dielectric constant. A method for manufacturing the high-frequency circuit board is also disclosed.

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
20230011786 · 2023-01-12 · ·

A wiring substrate includes an insulating layer including resin and filler particles, and an embedded wiring layer including wirings and embedded in the insulating layer such that the wirings are filling grooves formed on a surface of the insulating layer, respectively. The embedded wiring layer is formed such that the smallest line width of the wirings in the embedded wiring layer is in the range of 2 μm to 8 μm, and the insulating layer is formed such that the maximum particle size of the filler particles is 50% or less of the smallest line width of the wirings in the embedded wiring layer.