H05K3/4617

MANUFACTURING PROCEDURE FOR LABORATORY INTEGRATED ON A CHIP

Laboratory on chip and its layered manufacturing method, wherein the method includes: designing, by means of a computer program, a printed circuit (7), mixing and reaction cavities (3) of fluids, microchannels (2) and spaces (15) for the placement of electronic components to be found in each layer, mechanizing in one or more biocompatible substrates the different voids and passages that will make up the mixing and reaction cavities (3), microchannels (2), holes (8) that join the microchannels and spaces for the subsequent placement of electronic components (15), metallizing with a biocompatible conductive material those surfaces in which the printed circuit will be integrated (7) according to the design performed in the first step, generating the printed circuit (7) by photolithography and acid attack, bonding the electronic components in the corresponding spaces (15), joining all the layers that make up the final laboratory.

FLEXIBLE CIRCUIT BOARD
20230217596 · 2023-07-06 ·

A flexible circuit board includes liquid crystal polymer (LCP) layers and metal layers including circuit routes. Each of the LCP layers includes via structures. The metal layers and the LCP layers are alternatively stacked to form a multi-layer structure. Adjacent metal layers are electrically connected through the via structures. Some via structures of different LCP layers are substantially aligned with one another to form a stack of via structures. Each of the via structures includes openings filled with conductive material. The size of the opening fulfils the following equation: Vb≥cos(Bh/Vh)*Vt/k*2, where Vb is a diameter of a smaller aperture, Vt is a diameter of a bigger aperture, Vh is a combined thickness of a LCP layer and a metal layer, Bh is a thickness of a LCP layer and k is a tensile modulus.

Multilayer substrate, multilayer substrate mounting structure, method of manufacturing multilayer substrate, and method of manufacturing electronic device

A multilayer substrate includes a stacked body including a first main surface, and a conductor pattern (including a mounting electrode provided on the first main surface, and a first auxiliary pattern provided on the first main surface). The stacked body includes a plurality of insulating base material layers made of a resin as a main material and stacked on one another. The first auxiliary pattern is located adjacent to or in a vicinity of the mounting electrode. The mounting electrode, in a plan view of the first main surface (when viewed in the Z-axis direction), is interposed between a different conductor pattern (the mounting electrode) and the first auxiliary pattern.

High frequency / high power transition system using SIW structure
11521944 · 2022-12-06 · ·

The present disclosure relates to a transition system, which includes a monolithic microwave integrated circuit (MMIC) package and a printed-circuit-board (PCB) with a number of PCB vias. The MMIC package has a laminate-based body, which includes a substrate integrated waveguide (SIW) structure with a number of SIW vias, and a MMIC die over the laminate-based body. Herein, the SIW structure faces the PCB and is separate from the PCB with a gap in between. The SIW structure is configured to radiate radio frequency (RF) signals received from the MMIC die to the PCB. An arrangement of the PCB vias is scaling-mirrored to an arrangement of the SIW vias, such that each PCB via and a corresponding SIW via have a same relative position. The arrangement of PCB vias is about aligned with the arrangement of the SIW vias.

ELECTRONIC-COMPONENT CARRIER BOARD AND A WIRING METHOD FOR THE SAME

An electronic-component carrier board includes carrier plates formed in a stack, and insulating layers each disposed between two adjacent ones of the carrier plates. Multiple conductive pins extend through the insulating layers and the carrier plates. Multiple conductive wires equal in length and width are provided. Each conductive wire is connected to one of the conductive pins, covered by one of the insulating layers, disposed between two adjacent ones of the carrier plates, and extends outwardly from the stack of the carrier plates. A wiring method for the electronic-component carrier board is also disclosed.

Buildup board structure

A buildup board structure incorporating magnetic induction coils and flexible boards is disclosed. The buildup board structure includes at least one first buildup unit or at least one second buildup unit. The first buildup unit includes at least one first buildup body, the second buildup unit includes at least one second buildup body. Any two adjacent buildup bodies are separated by a covering layer provided with a central hole for electrical insulation. All central holes are aligned. Each buildup body includes a plurality of flexible boards, and each flexible board is embedded with a plurality of magnetic induction coils surrounding the corresponding central hole and connected through connection pads. The first and/or second buildup bodies are easily laminated in any order by any number as desired such that the effect of magnetic induction provided by the magnetic induction coils embedded in the buildup board structure are addable to greatly enhance the overall effect of magnetic induction.

Circuit board and manufacturing method thereof

A circuit board includes at least two circuit board units stacked together. Each circuit board unit includes a substrate and a circuit layer. The substrate defines a conductive hole penetrating therethrough. The conductive hole provided with a conductor therein. One side of the substrate further defines a groove, the groove including a concave portion aligned with the conductive hole. The circuit layer includes a connection pad located in the concave portion. The connection pad is shaped as a conductive protrusion, which surrounds and is electrically connected to the conductor. The circuit layer is located in the groove, and the conductive hole is electrically connecting the circuit layers of the circuit board units.

CONNECTION STRUCTURE EMBEDDED SUBSTRATE AND SUBSTRATE STRUCTURE INCLUDING THE SAME

A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.

COMPOSITE WIRING BOARD AND METHOD FOR MANUFACTURING COMPOSITE WIRING BOARD

A composite wiring board includes a first wiring board including a first insulating layer, a first conductor layer formed on the first insulating layer, and metal elements penetrating the first insulating layer and the first conductor layer such that the metal elements are electrically connected to each other by the first conductor layer, and a second wiring board including a second insulating layer and a second conductor layer forming on the second insulating layer and including metal connection terminals such that the metal connection terminals are corresponding to and directly bonded to the metal elements of the first wiring board, respectively.

Component-embedded substrate
09854681 · 2017-12-26 · ·

A component-embedded substrate includes: a resin substrate having a mount surface and a peripheral surface surrounding a perimeter of the mount surface; a first mounted component mounted on the mount surface; a second mounted component mounted on the mount surface and spaced from the first mounted component; and a first embedded chip-type electronic component disposed in the resin substrate. The first embedded chip-type electronic component is located close to the peripheral surface of the resin substrate. The mount surface includes: a first region located between the first and second mounted components and extending along a cross direction crossing an arrangement direction along which the first and second mounted components are arranged with respect to each other; and a second region located outside the first region. The first embedded chip-type electronic component is arranged to extend in the first and second regions as seen from above the mount surface.