Patent classifications
H10F71/1278
Semiconductor wafer and method
In an embodiment, a method includes treating an edge region of a wafer including a substrate having an upper surface and one or more epitaxial Group III nitride layers arranged on the upper surface of the substrate, so as to remove material including at least one Group III element from the edge region.
Radiation and temperature hard multi-pixel avalanche photodiodes
The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.
Method for producing an optoelectronic semiconductor component and optoelectronic semiconductor component
A method for producing an optoelectronic semiconductor component having a plurality of image points and an optoelectronic component are disclosed. In an embodiment the method includes providing a semiconductor layer sequence including an n-conducting semiconductor layer, an active zone, and a p-conducting semiconductor layer; applying a first layer sequence, wherein the first layer sequence is divided into a plurality of regions which are arranged laterally spaced with respect to each other on a top surface of the p-conducting semiconductor layer; c) applying a second insulating layer; partially removing the p-conducting semiconductor layer and the active zone, in such a way that the n-conducting semiconductor layer is exposed at points and the p-conducting semiconductor layer is divided into individual regions which are laterally spaced with respect to each other, wherein each of the regions comprises a part of the p-conducting semiconductor layer and a part of the active zone.
Electronic devices comprising n-type and p-type superlattices
A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist essentially of a corresponding donor or acceptor material.
Solid-state neutron detector device
The structure and methods of fabricating a high efficiency compact solid state neutron detector based on III-Nitride semiconductor structures deposited on a substrate. The operation of the device is based on absorption of neutrons, which results in generation of free carriers.
OPTOELECTRONIC DEVICE HAVING SEMICONDUCTOR ELEMENTS AND METHOD FOR MANUFACTURING SAME
An optoelectronic device including a substrate having a surface, openings which extend in the substrate from the surface, and semiconductor elements, each semiconductor element partially extending into one of the openings and partially outside said opening, the height of each opening being at least 25 nm and at most 5 m and the ratio of the height to the smallest diameter of each opening being at least 0.5 and at most 15.
Reusable nitride wafer, method of making, and use thereof
Techniques for processing materials for manufacture of gallium-containing nitride substrates are disclosed. More specifically, techniques for fabricating and reusing large area substrates using a combination of processing techniques are disclosed. The methods can be applied to fabricating substrates of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others. Such substrates can be used for a variety of applications including optoelectronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photo detectors, integrated circuits, transistors, and others.
RADIATION-DETECTING STRUCTURES AND FABRICATION METHODS THEREOF
Radiation detecting-structures and fabrications methods thereof are presented. The methods include, for instance: providing a substrate, the substrate including at least one trench extending into the substrate from an upper surface thereof; and epitaxially forming a radiation-responsive semiconductor material layer from one or more sidewalls of the at least one trench of the substrate, the radiation-responsive semiconductor material layer responding to incident radiation by generating charge carriers therein. In one embodiment, the sidewalls of the at least one trench of the substrate include a (111) surface of the substrate, which facilitates epitaxially forming the radiation-responsive semiconductor material layer. In another embodiment, the radiation-responsive semiconductor material layer includes hexagonal boron nitride, and the epitaxially forming includes providing the hexagonal boron nitride with an a-axis aligned parallel to the sidewalls of the trench.
III-V NITRIDE SEMICONDUCTOR DEVICE
In an embodiment, a III-V nitride semiconductor device comprises an AlGaN epitaxial layer and a metal electrode. The AlGaN epitaxial layer is a C-plane n-type or undoped layer, and the AlGaN epitaxial layer has an epitaxial surface consisting of one or more semi-polar planes. The metal electrode is directly formed on the one or more semi-polar planes.
Thermal doping of materials
A method is disclosed for doping a semiconductor material comprising the steps of providing a semiconductor material having a first and a second surface. A dopant precursor is applied on the first surface of the semiconductor material. A thermal energy beam is directed onto the second surface of the semiconductor material to pass through the semiconductor material and impinge upon the dopant precursor to dope the semiconductor material thereby.