Patent classifications
H10F77/122
SCHOTTKY-BARRIER PHOTODETECTOR DEVICE WITH GERMANIUM AND IMAGE SENSOR INCLUDING THE PHOTODETECTOR DEVICE
A photodetector device includes a germanium semiconductor layer including a plurality of nanostructures at an upper surface of the germanium semiconductor layer, a conductive layer on the plurality of nanostructures, the conductive layer and the germanium semiconductor layer forming a first Schottky junction, and a tunneling barrier layer between the germanium semiconductor layer and the conductive layer.
SCHOTTKY-BARRIER PHOTODETECTOR DEVICE WITH GERMANIUM AND IMAGE SENSOR INCLUDING THE PHOTODETECTOR DEVICE
A photodetector device includes a germanium semiconductor layer including a plurality of nanostructures at an upper surface of the germanium semiconductor layer, a conductive layer on the plurality of nanostructures, the conductive layer and the germanium semiconductor layer forming a first Schottky junction, and a tunneling barrier layer between the germanium semiconductor layer and the conductive layer.
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREFOR, AND ELECTRONIC APPARATUS
A semiconductor device, a manufacturing method therefor, and an electronic apparatus that reduces a parasitic capacitance generated between an internal electrode and a board silicon to suppress waveform distortion and signal delay of high-frequency signals, thereby enabling a high-speed operation. A configuration to include: a board silicon; a silicon oxide film stacked on the board silicon; an inter-wiring-layer film having an internal electrode stacked on the silicon oxide film; a through-hole forming a stepped hole with a larger-diameter hole extending from the board silicon to the silicon oxide film and a smaller-diameter hole extending from the silicon oxide film to the internal electrode; an interlayer dielectric film stacked on a circumferential side surface of the larger-diameter hole and the board silicon; and a redistribution layer on an inner peripheral surface of the through-hole and the interlayer dielectric film and connected to the internal electrode.
SOLID STATE DETECTOR FOR VERY HIGH DOSE RATE RADIATION
A solid state detector for ionizing radiation having a semiconductor substrate, a conductive metal layer, a first and a second active region, the first active region having a faster response time to ionizing radiation than the second active region. A first voltage is applied to the first active region and a second voltage applied to the second active region, the first and second voltages having opposite polarities and equal magnitudes. The solid state detector being configured to maintain a constant output voltage when not irradiated and to output an output voltage when irradiated, the output voltage being the time resolved sum of a first charge and a second charge accumulated by the two active regions, the first charge and the second charge having opposite polarities and configured to drain residual charges from the active regions.
SOLAR CELL
A solar cell is provided. The solar cell includes a semiconductor substrate. The front surface of the semiconductor substrate has a metal contact area and a non-metal contact area. A first tunneling layer, a first doped polysilicon layer and a first metal electrode are sequentially stacked on the metal contact area. The first metal electrode is electrically connected to the first doped polysilicon layer. A second tunneling layer, a second doped polysilicon layer and a second metal electrode are sequentially stacked on the back surface of the semiconductor substrate.
DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF
A display apparatus includes a color filter substrate, a first encapsulation layer, a first bank layer, wavelength selective dimming patterns, color conversion patterns, a second encapsulation layer, a driving circuit substrate, a second bank layer and light emitting components. The wavelength selective dimming patterns are disposed in at least a portion of first openings of the first bank layer. The color conversion patterns are disposed in the first openings and on the wavelength selective dimming patterns. One wavelength selective dimming pattern includes a base material and scattering particles. The wavelength selective dimming pattern has a thickness within a range of 2 m to 10 m in a direction perpendicular to the color filter substrate. A volume ratio of the scattering particles to the wavelength selective dimming pattern falls within a range of 0.5% to 4.5%. Diameters of the scattering particles fall within a range of 80 nm to 200 nm.
QUANTUM DEVICE FOR FORMING AN ARRAY OF QUANTUM DOTS AND ASSOCIATED MANUFACTURING METHOD
A quantum device configured to be able to form an array of quantum dots, the device including for this: an active layer made of a semiconductor material; a plurality of first gates disposed along a plurality of rows; a plurality of second gates disposed along a plurality of columns perpendicular to the rows of the plurality of rows; a plurality of third gates, each third gate of the plurality of third gates being disposed at the intersection of one row of the plurality of rows and one column of the plurality of columns, each third gate being separated from the nearest third gates, on a row by a first gate and on a column by a second gate; a plurality of fourth gates, each fourth gate being disposed between two second gates along the rows and between two first gates along the columns.
Hybrid passivation back contact cell and fabrication method thereof
The present disclosure pertains to the field of back contact cell technologies, and particularly relates to a hybrid passivation back contact cell and a fabrication method thereof, the hybrid passivation back contact cell including: an N-type doped silicon substrate having a light receiving surface and a back surface, and a first semiconductor layer and a second semiconductor layer which are arranged on the back surface, wherein the second semiconductor layer includes an intrinsic silicon layer and a P-type doped silicon layer sequentially arranged in an outward direction perpendicular to the back surface, and the first semiconductor layer includes a tunneling oxide layer and an N-type doped silicon crystal layer sequentially arranged in the outward direction perpendicular to the back surface.
Semiconductor on insulator structure for a front side type imager
A semiconductor on insulator type structure, which may be used for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.
Manufacturing process for a silicon carbide ultraviolet light photodetector
The photodetector is formed in a silicon carbide body formed by a first epitaxial layer of an N type and a second epitaxial layer of a P type. The first and second epitaxial layers are arranged on each other and form a body surface including a projecting portion, a sloped lateral portion, and an edge portion. An insulating edge region extends over the sloped lateral portion and the edge portion. An anode region is formed by the second epitaxial layer and is delimited by the projecting portion and by the sloped lateral portion. The first epitaxial layer forms a cathode region underneath the anode region. A buried region of an N type, with a higher doping level than the first epitaxial layer, extends between the anode and cathode regions, underneath the projecting portion, at a distance from the sloped lateral portion as well as from the edge region.