A polycrystalline bulk body of this invention has uniformity in superconducting properties, in comparison to a polycrystalline bulk body including crystal grains each constituted by (Ba.sub.1-xK.sub.x)Fe.sub.2As.sub.2. A polycrystalline bulk body (1) of this invention includes crystal grains each constituted by an iron-based compound (10) expressed by chemical formula AA′Fe.sub.4As.sub.4, where A is Ca and A′ is K, the iron-based compound (10) having a crystal structure in which AFe.sub.2As.sub.2 layers (16) and A′Fe.sub.2As.sub.2 layers (17) are alternately stacked.

The present invention relates to a precursor (1) for production of a high-temperature superconductor (HTS) in ribbon form, comprising a metallic substrate (10) in ribbon form having a first ribbon side (11) and a second ribbon side (12), wherein, on the first ribbon side (11), (a) the substrate (10) has a defined texture as template for crystallographically aligned growth of a buffer layer or an HTS layer and (b) an exposed surface of the substrate (10) is present or one or more layers (20,30) are present that are selected from the group consisting of: buffer precursor layer, pyrolyzed buffer precursor layer, buffer layer, HTS precursor layer, pyrolyzed HTS buffer precursor layer and pyrolyzed and further consolidated HTS buffer precursor layer, and, on the second ribbon side (12), at least one ceramic barrier layer (40) that protects the substrate (10) against oxidation or a precursor which is converted to such a layer during the HTS crystallization annealing or the pyrolysis is present, wherein, when one or more layers (20, 30) are present on the first ribbon side (11), the ceramic barrier layer (40) or the precursor thereof has a different chemical composition and/or a different texture than the layer (20) arranged on the first ribbon side (11) and directly adjoining the substrate (10). In this precursor, the barrier layer (40) is a layer that delays or prevents ingress of oxygen to the second ribbon side (12) and is composed of conductive ceramic material or a precursor which is converted to such a precursor during the HTS crystallization annealing or the pyrolysis, and the ceramic material is an electrically conductive metal oxide or an electrically conductive mixture of metal oxides, wherein the conductive metal oxide or one or more metal oxides in the conductive mixture is/are preferably metal oxide(s) doped with an extraneous metal.

Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.

A superconducting quantum hybrid system includes: a silicon carbide (SiC) epitaxial layer; and a superconducting qubit line, the superconducting qubit line corresponding to a superconducting qubit, where a designated region of the SiC epitaxial layer includes a nitrogen vacancy (NV) center, the NV center being formed by implanting nitrogen ions into the designated region of the SiC epitaxial layer, and where the superconducting qubit line is located on a surface of the SiC epitaxial layer, the superconducting qubit is coupled to a solid-state defect qubit, and the solid-state defect qubit is a qubit corresponding to the NV center in the designated region.

A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

A superconducting circuit includes a first component having a first connection point. The first connection point has a first width. The superconducting circuit includes a second component having a second connection point. The second connection point has a second width that is larger than the first width. The superconducting circuit includes a superconducting connector shaped to reduce current crowding. The superconducting connector electrically connects the first connection point and the second connection point. The superconducting connector includes a first taper positioned adjacent the first connection point and having a non-linear shape and a second taper positioned adjacent the second connection point.

A system that includes: an array of qubits, each qubit of the array of qubits comprising a first electrode corresponding to a first node and a second electrode corresponding to a second node, wherein, for a first qubit in the array of qubits, the first qubit is positioned relative to a second qubit in the array of qubits such that a charge present on the first qubit induces a same charge on each of the first node of the second qubit and the second node of the second qubit, such that coupling between the first qubit and the second qubit is reduced, and wherein none of the nodes share a common ground is disclosed.

The invention relates to a (RE,Y)-123 superconducting film containing mixed artificial pinning centers and a preparation method thereof, wherein a stoichiometric ratio of Cu in a parent phase of the (RE,Y)-123 superconducting film is 3.05-5; the mixed artificial pinning centers include a perovskite structure BaMO3 and a double-perovskite structure oxide Ba2(RE,Y)NO6; and a total mole percentage of Ba2(RE,Y)NO6 in the superconducting film is not less than 2.5%. The mixed artificial pinning centers form well-aligned column structures along the thickness direction in the superconducting film. The invention is intended not only to solve the problem that a single secondary phase cannot be well aligned along the thickness direction of (RE,Y)-123 when using the high-speed pulsed laser deposition technique, but also to effectively overcome the film thickness effect of the (RE,Y)-123 superconducting film containing mixed artificial pinning centers, hence the in-field current carrying capacity of the superconducting film is significantly improved in industrialized high-speed production.

A method of fabricating a superconductor device includes providing a first metal layer on top of the substrate. An oxidation of a top surface of the first metal layer is rejected. A second metal layer is deposited on top of the second metal layer. A superconducting alloy of the first metal layer and the second metal layer is created between the first metal layer and the second metal layer. There is no oxide layer between the superconducting alloy and the first metal layer.

A method and a device for preparing an inductance element, an inductance element, and a superconducting circuit are provided. The method includes acquiring a compound for preparing an inductance element, a superconducting coherence length and a magnetic field penetration depth of the compound meeting a preset condition; and annealing the compound to cause decomposition between a non-superconductor phase and a superconductor phase in the compound to generate the inductance element, the kinetic inductance of the inductance element being greater than the geometric inductance of the inductance element.