A qubit array reparation system includes a reservoir of ultra-cold particle, a detector that determines whether or not qubit sites of a qubit array include respective qubit particles, and a transport system for transporting an ultra-cold particle to a first qubit array site that has been determined by the probe system to not include a qubit particle so that the ultra-cold particle can serve as a qubit particle for the first qubit array site. A qubit array reparation process includes maintaining a reservoir of ultra-cold particles, determining whether or not qubit-array sites contain respective qubit particles, each qubit particle having a respective superposition state, and, in response to a determination that a first qubit site does not contain a respective qubit particle, transporting an ultracold particle to the first qubit site to serve as a qubit particle contained by the first qubit site.

A system and method for storing information in a quantum computer using a quantum storage ring. The method comprises cooling ions in the quantum storage ring to a low temperature; and binding the ions into a lattice structure, forming an ion Coulomb crystal.

According to a first aspect of the disclosure, there is provided a device comprising: a substrate comprising a III-V semiconductor having a crystalline surface; and a kagome lattice formed from atoms of an element with atomic number Z greater than or equal to 14, deposited on said surface of the semiconductor. According to a second aspect there is provided a fabrication method for forming a kagome lattice or other lattice structure such as a honeycomb or Moiré super lattice.

Surface supported quantum wells with a confined surface state capture and stably confine neutral atoms and molecules in a nanometer precise environment. Depending on the physico-chemical conditions in the capturing process, the degree of occupancy, the temperature of the solid substrate, and/or the history of external stimuli like electromagnetic field pulses, these atoms, molecules or clusters assume unique configurations. The atoms or molecules are able to remain coupled to the quantum-well specific electronic state in the confinement and as such exhibit local and delocalized quantum entanglement. The capturing potential arises from the superposition of Pauli repulsion between the captured object and the quantum well-specific confined electronic state. This occurs within on-surface atomic or supramolecular assemblies or surface supported coordination or covalent networks.

A method for fabricating a single electron transistor is provided. A substrate includes a substantially planar surface with a source electrode, a drain electrode, and a gate electrode thereon, with the source and drain electrodes spaced apart from one another by a gap. The source electrode and the drain electrode are electrified, and a single nanometer-scale conductive particle is electrospray deposited in the gap. The single nanometer-scale conductive particle has an effective size of not greater than 10 nanometers. At least one carbon nanotube is deposited on the substrate and subjected to dielectrophoresis to position the carbon nanotube within 1 nanometer of the single nanometer-scale conductive particle. The at least one carbon nanotube establishes a first connection between the source electrode and the single nanometer-scale conductive particle and a second connection between the drain electrode and the single nanometer-scale conductive particle.

In a general aspect, a quantum control device includes a substrate having a substrate surface. An insulator layer is disposed over the substrate surface and defines a cavity. The insulator layer includes an insulator surface that defines an opening to the cavity. The quantum control device also includes a field-responsive layer over the insulator surface. The field-responsive layer includes a target region that resides over the opening to the cavity. The quantum control device additionally includes a projection extending from the substrate into the cavity and terminating at a tip. The projection is configured to produce an electric field that interacts with a quantum state in the target region. The tip resides in the cavity and configured to concentrate the electric field produced by the projection.

The tunneling channel of a field effect transistor comprising a plurality of tunneling elements contacting a channel substrate. Applying a source-drain voltage of greater than a turn-on voltage produces a source-drain current of greater than about 10 pA. Applying a source-drain voltage of less than a turn-on voltage produces a source-drain current of less than about 10 pA. The turn-on voltage at room temperature is between about 0.1V and about 40V.

An ion trap device is provided as well as a method of manufacturing the ion trap device including a substrate, central DC electrode, RF electrode, side electrode and an insulating layer. Disposed over the substrate, the central DC electrode includes DC connector pad and DC rail connected thereto. The RF electrode includes RF rail adjacent to the DC rail and RF pad connected to RF rail. The side electrode has RF electrode disposed between thereof and the central DC electrode. The insulating layer supports one of the central DC electrode, RF electrode and side electrode, on a top surface of the substrate. The insulating layer includes first insulating layer and second insulating layer disposed over the first insulating layer, and the second insulating layer includes an overhang protruding with respect to the first insulating layer in a width direction of the ion trap device.

A security test logic system can include a non-transitory memory configured to store measurements from a measurement apparatus, the measurement outputs comprising indications of presence or absence of coincidences where particles are detected at more than one detector at substantially the same time, the detectors being at the end of different channels from a particle source and having substantially the same length. The system can include a processor configured to compute a test statistic from the stored measurements. The test statistic may express a Bell inequality, and the system can compare the test statistic with a threshold. The processor can be configured to generate and output a certificate certifying that the measurements are from a quantum system if the value of the computed test statistic passes the threshold.

Described herein are devices in which quantum noise is reduced, such as by incorporating the devices as part of or adjacent to a Casimir cavity. The devices with reduced quantum noise can be paired with a free-space electric device to allow for a difference in noise power between the two to be captured.