UNIVERSAL SERIAL BUS PORT CONTROLLER AND ELECTRONIC APPARATUS

Abstract

Disclosed herein is a universal serial bus port controller on a source side. The universal serial bus port controller is compatible with universal serial bus Type-C. A source is equipped with the universal serial bus port controller including a power supply terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, and a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line. The universal serial bus port controller includes an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on the basis of a temporal change in the output voltage.

Claims

1. A universal serial bus port controller on a source side, the universal serial bus port controller being compatible with universal serial bus Type-C, a source equipped with the universal serial bus port controller including a power supply terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, and a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line, the universal serial bus port controller comprising: an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on a basis of a temporal change in the output voltage.

2. The universal serial bus port controller according to claim 1, wherein a threshold voltage that decreases according to an elapsed time from the turning on of the discharge switch is determined, and the abnormality detector determines an abnormality when the output voltage detected at each time exceeds the corresponding threshold voltage.

3. The universal serial bus port controller according to claim 2, wherein the threshold voltage is determined for each voltage level immediately previously supplied by the power supply circuit.

4. The universal serial bus port controller according to claim 1, wherein the abnormality detector calculates power on a basis of the output voltage detected at each time, and determines an abnormality when a value obtained by integrating the power at each time exceeds a predetermined threshold value.

5. The universal serial bus port controller according to claim 4, wherein the threshold value is determined for each voltage level immediately previously supplied by the power supply circuit.

6. The universal serial bus port controller according to claim 1, wherein the discharge switch is included in the universal serial bus port controller.

7. The universal serial bus port controller according to claim 1, wherein the discharge resistance is included in the universal serial bus port controller.

8. The universal serial bus port controller according to claim 1, wherein the universal serial bus port controller is integrated on one semiconductor substrate.

9. An electronic apparatus comprising: the universal serial bus port controller according to claim 1.

10. An electronic apparatus comprising: a universal serial bus receptacle including a power supply terminal and a grounding terminal; a power supply circuit; a switch connected between an output of the power supply circuit and the power supply terminal; a capacitor connected to the power supply terminal; a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line; and an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on a basis of a temporal change in the output voltage.

11. The electronic apparatus according to claim 10, wherein a threshold voltage that decreases according to an elapsed time from the turning on of the discharge switch is determined, and the abnormality detector determines an abnormality when the output voltage detected at each time exceeds the corresponding threshold voltage.

12. The electronic apparatus according to claim 11, wherein the threshold voltage is determined for each voltage level immediately previously supplied by the power supply circuit.

13. The electronic apparatus according to claim 10, wherein the abnormality detector calculates power on a basis of the output voltage detected at each time, and determines an abnormality when a value obtained by integrating the power at each time exceeds a predetermined threshold value.

14. The electronic apparatus according to claim 13, wherein the threshold value is determined for each voltage level immediately previously supplied by the power supply circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] FIG. 1 is a block diagram of a feeding system;

[0030] FIG. 2 is an operation sequence diagram of the feeding system of FIG. 1;

[0031] FIG. 3 is a block diagram of a feeding system according to an embodiment;

[0032] FIG. 4 is a circuit diagram depicting an example of a configuration of a USB port controller;

[0033] FIG. 5 is a flowchart of assistance in explaining a first abnormality detecting method;

[0034] FIG. 6 is a diagram of assistance in explaining operation in a normal case after the disconnection of a feeding device and a power receiving device from each other in the feeding system of FIG. 3;

[0035] FIG. 7 is a diagram of assistance in explaining operation in an abnormal case after the disconnection of the feeding device and the power receiving device from each other in the feeding system of FIG. 3;

[0036] FIG. 8 is a diagram of assistance in explaining another operation in an abnormal case after the disconnection of the feeding device and the power receiving device from each other in the feeding system of FIG. 3;

[0037] FIG. 9 is a diagram of assistance in explaining operation in an abnormal state in a comparative technology;

[0038] FIG. 10 is a diagram indicating pulse limit power;

[0039] FIG. 11 is a flowchart of assistance in explaining a second abnormality detecting method;

[0040] FIG. 12 is a circuit diagram of a feeding device according to a first modification; and

[0041] FIG. 13 is a circuit diagram of a feeding device according to a second modification.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(Outline of Embodiments)

[0042] An outline of a few illustrative embodiments of the present disclosure will be described. This outline describes, in a simplified manner, a few concepts of one or a plurality of embodiments as an introduction to the following detailed description for a purpose of basic understanding of the embodiments, and does not limit the scope of the invention or the disclosure. This outline is neither a comprehensive outline of all conceivable embodiments nor one intended to identify important elements of all of the embodiments or to demarcate the scope of a part or all of examples. For convenience, “one embodiment” may be used to refer to one embodiment (an example or a modification) or a plurality of embodiments (examples or modifications) disclosed in the present specification.

[0043] One embodiment relates to a USB port controller on a source side, the USB port controller being compatible with USB Type-C. A source equipped with the USB port controller includes a power supply terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, and a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line. The USB port controller includes an abnormality detector that detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on the basis of a temporal change in the output voltage.

[0044] When the circuit is normal, the output voltage occurring at the power supply terminal decreases with time as the discharge of the capacitor progresses, and the power consumption of the discharge resistance also decreases with time. Accordingly, an abnormality can be detected in a short period of time by monitoring a temporal change in the output voltage and determining whether the output voltage or the power consumption is decreasing as expected.

[0045] In one embodiment, a threshold voltage may be determined in a manner corresponding to an elapsed time from the turning on of the discharge switch. The abnormality detector may determine an abnormality when the output voltage detected at each time exceeds the corresponding threshold voltage.

[0046] In one embodiment, the abnormality detector may calculate power on the basis of the output voltage detected at each time, and determine an abnormality when a value obtained by integrating the power at each time exceeds a predetermined threshold value.

[0047] In one embodiment, the discharge switch may be included in the USB port controller.

[0048] In one embodiment, the discharge resistance may be included in the USB port controller.

[0049] In one embodiment, the USB port controller may be integrated on one semiconductor substrate. “Integrated” includes a case where all of circuit constituent elements are formed on the semiconductor substrate and a case where main circuit constituent elements are integrated. Some of resistances, capacitors, and other components may be provided outside the semiconductor substrate for adjustment of circuit constants. Integrating the circuit on one chip can reduce a circuit area, and hold characteristics of the circuit elements uniform.

[0050] An electronic apparatus according to one embodiment includes a USB receptacle including a power supply terminal and a grounding terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line, and an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on, and which detects an abnormality on the basis of a temporal change in the output voltage.

[0051] When the circuit is normal, the output voltage occurring at the power supply terminal decreases with time as the discharge of the capacitor progresses, and the power consumption of the discharge resistance also decreases with time. Accordingly, an abnormality can be detected by monitoring a temporal change in the output voltage and determining whether the output voltage or the power consumption is decreasing as expected.

[0052] In one embodiment, a threshold voltage may be determined in a manner corresponding to an elapsed time from the turning on of the discharge switch. The abnormality detector may determine an abnormality when the output voltage detected at each time exceeds the corresponding threshold voltage.

[0053] In one embodiment, the abnormality detector may calculate power on the basis of the output voltage detected at each time, and determine an abnormality when a value obtained by integrating the power at each time exceeds a predetermined threshold value.

EMBODIMENT

[0054] A preferred embodiment will hereinafter be described with reference to the drawings. Identical or equivalent constituent elements, members, and processing depicted in each drawing are identified by the same reference signs, and repeated description thereof will be omitted as appropriate. In addition, the embodiment is not restrictive of the disclosure and the invention and is illustrative, and all features described in the embodiment and combinations thereof are not necessarily essential to the disclosure and the invention.

[0055] In the present specification, a “state in which a member A is connected to a member B” includes not only a case where the member A and the member B are physically directly connected to each other but also a case where the member A and the member B are indirectly connected to each other via another member that does not essentially affect a state of electric connection between the member A and the member B or does not impair functions or effects produced by the coupling of the member A and the member B.

[0056] Similarly, a “state in which a member C is connected (provided) between the member A and the member B” includes not only a case where the member A and the member C or the member B and the member C are directly connected to each other but also a case where the member A and the member C or the member B and the member C are indirectly connected to each other via another member that does not essentially affect a state of electric connection between the member A and the member C or the member B and the member C or does not impair functions or effects produced by the coupling of the member A and the member C or the member B and the member C.

[0057] FIG. 3 is a block diagram of a feeding system 100 according to an embodiment. The feeding system 100 is compliant with the USB Type-C standard. The feeding system 100 includes a feeding device (referred to also as a source) 200 and a power receiving device (referred to also as a sink) 300. The feeding device 200 and the power receiving device 300 are connected to each other via a USB cable 106.

[0058] The feeding device 200 is, for example, included in an electronic apparatus 102. The electronic apparatus 102 may be an AC adapter. The power receiving device 300 is included in a battery driven type electronic apparatus 400 such as a smart phone, a tablet terminal, a digital camera, a digital video camera, or a portable audio player.

[0059] A configuration of the source side, that is, the electronic apparatus 102 side, will first be described.

[0060] The electronic apparatus 102 includes the feeding device 200 and a receptacle 108. The feeding device 200 includes a power supply circuit 202, a USB port controller 600 on a feeding side, a bus switch SW11, a discharge switch SW12, a discharge resistance R12, and capacitors C11 and C12. The USB cable 106 is detachably connected to the receptacle 108 of the electronic apparatus 400. Incidentally, there is also a charge adapter in which the receptacle 108 is omitted and the USB cable 106 is integral with the electronic apparatus 102.

[0061] The receptacle 108 includes a V.sub.BUS terminal for supplying a bus voltage V.sub.BUS, a GND terminal for supplying a ground voltage V.sub.GND (0 V), and configuration channel (CC) ports.

[0062] The power supply circuit 202 generates the bus voltage V.sub.BUS. The power supply circuit 202 may include an AC/DC converter which receives AC 100 V from an external power supply (for example, a commercial alternating-current power supply) not depicted and converts AC 100 V into a direct-current bus voltage V.sub.BUS. The bus voltage V.sub.BUS generated by the power supply circuit 202 is supplied to the power receiving device 300 via a bus line of the USB cable 106 and the bus switch SW11.

[0063] The USB port controller 600 is a port controller for

[0064] USB Type-C and USB-PD. The USB port controller 600 and a USB port controller 500 are connected to each other via CC lines.

[0065] The USB port controller 600 includes a CC pin circuit 610, an abnormality detector 620, and a processor 630.

[0066] The CC pin circuit 610 includes a pull-up resistance that pulls up CC pins. It is declared by this pull-up resistance that the feeding device 200 is the source. In a case where the feeding device 200 has a dual power role (DPR) that allows switching between the sink and the source, the CC pin circuit 610 is configured to be switchable between a state in which the CC pins are pulled down (that is, the sink) and a state in which the CC pins are pulled up (that is, the source).

[0067] The CC pin circuit 610 includes a comparator that compares the voltages of the CC pins with a threshold voltage, or other component. It is detected on the basis of an output of this comparator that the power receiving device 300 is connected to the feeding device 200 via the USB cable 106.

[0068] In addition, the USB port controller 500 and the USB port controller 600 can communicate with each other via the CC lines. A transceiver for communication is included in the CC pin circuit 610.

[0069] The USB port controller 600 and the USB port controller 500 negotiate the voltage level of the bus voltage V.sub.BUS to be supplied by the feeding device 200. The USB port controller 600 controls the power supply circuit 202 in a manner providing the determined voltage level, and performs on-off control of the bus switch SW11. The processor 630 executes a software program, and thereby performs negotiation with the USB port controller 500. The processor 630 may be a microcontroller independent of the USB port controller 600.

[0070] After the USB port controller 600 detects the connection of the power receiving device 300 to the feeding device 200, the USB port controller 600 turns on the bus switch SW11 on condition that the bus voltage (output voltage) V.sub.BUS_SRC of the V.sub.BUS terminal is lower than a predetermined threshold value vSafe0V.

[0071] In addition, the USB port controller 600 turns off the bus switch SW11 when the feeding device 200 and the power receiving device 300 are disconnected from each other. In addition, the USB port controller 600 turns on the discharge switch SW12 to decrease the output voltage V.sub.BUS SRC to 0 V. The output voltage V.sub.BUS_SRC thereby becomes lower than the threshold value vSafe0V.

[0072] The abnormality detector 620 monitors the output voltage V.sub.BUS_SRC of the V.sub.BUS terminal. The abnormality detector 620 detects the output voltage V.sub.BUS_SRC of the V.sub.BUS terminal a plurality of times after the USB port controller 600 turns on the discharge switch SW. Then, the abnormality detector 620 detects an abnormality on the basis of a temporal change in the output voltage V.sub.BUS_SRC .

[0073] When the abnormality detector 620 detects an abnormality, the USB port controller 600 turns off the discharge switch SW12, and thereby interrupts a discharge path.

[0074] FIG. 4 is a circuit diagram depicting an example of a configuration of the USB port controller 600. The discharge switch SW12 is constituted by an N-channel metal-oxide semiconductor field effect transistor (MOSFET). FIG. 4 depicts only the abnormality detector 620 in the USB port controller 600.

[0075] The abnormality detector 620 includes an A/D converter 622, a determining unit 624, and a driver 626.

[0076] The A/D converter 622 converts the output voltage V.sub.BUS_SRC into a digital value. The abnormality detector 620 detects an abnormality by digital signal processing. In this case, a part or all of functions of the abnormality detector 620 may be implemented in the processor 630. A result of determination by the determining unit 624 is input to the driver 626.

[0077] The driver 626 drives the discharge switch SW12 according to a control signal CTRL_SW from the processor 630. When the determining unit 624 detects an abnormality, the driver 626 turns off the discharge switch SW12, irrespective of the control signal CTRL_SW.

[0078] An abnormality determining method (first abnormality detecting method) of the abnormality detector 620 in the present embodiment will be described. Threshold voltages (referred to also as a threshold voltage train) V.sub.TH1, V.sub.TH2, . . . V.sub.THn which decrease according to elapsed times t.sub.1, t.sub.2, . . . t.sub.n from the turning on of the discharge switch SW12 are determined.

[0079] When the capacitor C12 whose initial voltage is v.sub.0 is discharged by the resistance having a resistance value R12, the voltage v(t) of the capacitor is expressed by an RC discharge equation as Equation (1). vo is an initial voltage at a time of a start of discharge.

v(t)=v.sub.0×exp{−t/(C12.Math.R12)}. . .  (1)

[0080] The threshold values V.sub.TH1, V.sub.TH2 , . . . may be determined according to Equation (1) of RC discharge.

[0081] The threshold voltage V.sub.TH(t) may, for example, be determined on the basis of Equation (2).

V.sub.TH(t)=A×v.sub.0 × exp{−t/(C12.Math.R12)}—. . .  (2)

where A is a coefficient satisfying A >1.

[0082] Alternatively, the threshold voltage V.sub.TH(t) may be determined by Equation (3).

V.sub.TH(t)=v.sub.0 × exp{−t/(C12.Math.R12)} +V.sub.merg . . .  (3) where V.sub.merg

is a predetermined voltage margin.

[0083] Alternatively, the threshold voltage V.sub.TH(t) may be determined by Equation (4).

[0084] V.sub.TH(t)=A ×v.sub.0× exp{−t/(C12.Math.R12)} +V.sub.merg

[0085] The threshold voltage at each time is expressed as follows.

[0086] V.sub.TH1=V.sub.TH (t.sub.1)

[0087] V.sub.TH2=V.sub.TH (t.sub.2)

[0088] . . .

[0089] V.sub.THn=V.sub.TH (t.sub.n)

[0090] The initial voltage vo at a time of a start of charge is equal to the voltage level of the bus voltage V.sub.BUS_SRC during immediately preceding feeding. In USB-PD, the output voltage V.sub.BUS_SRC of the feeding device 200 can assume various voltage levels according to negotiation. Accordingly, the voltage v.sub.0 in Equations (1) to (4) can be determined according to a set value of the immediately preceding bus voltage. That is, the threshold voltage train V.sub.TH1 to V.sub.THn is determined for each voltage level immediately previously supplied by the power supply circuit.

[0091] FIG. 5 is a flowchart of assistance in explaining the first abnormality detecting method. First, the discharge switch SW12 is turned on, and discharge is thereby started (S100). The abnormality detector 620 sets i=1, and sets a first detection time ti (S102). Then, at each time ti (i=1, 2, . . . n), the output voltage V.sub.BUS_SRCi is detected, and thereby a voltage V.sub.DETi is obtained (S104). Then, the detected voltage V.sub.DETi is compared with the corresponding threshold voltage VTHi (S106). An abnormality is determined (S108) when the detected voltage

[0092] V.sub.DETi exceeds the threshold voltage V.sub.THi (V.sub.DETi>V.sub.THi) in 5106).

[0093] When the abnormality is determined, the switch SW12 is turned off immediately (S106), and an abnormal ending is performed.

[0094] When the detected voltage V.sub.DETi is lower than the threshold voltage V.sub.THi (V.sub.DETi<V.sub.THi) in processing 5106 (N in S106), normality is determined, and whether a final detection time has arrived is checked (S112). When the final detection time has arrived (i=n) (Y in S112), it is determined that the discharge is completed normally, and a normal ending is performed. When the final detection time has not arrived (i<n) (N in S112), i is incremented, and a wait is made until a next time t.sub.i+1 (S114). Then, a return is made to processing 5104.

[0095] The first abnormality determining method has been described above.

[0096] Returning to FIG. 3, description will be made of a configuration of the sink side, that is, the electronic apparatus 400.

[0097] The electronic apparatus 400 includes a battery 402, a receptacle 404, a load (system) circuit 406, and the power receiving device 300. The battery 402 is a rechargeable secondary battery. The load circuit 406 includes a CPU, a memory, a liquid crystal display, an audio circuit, and other components. The electronic apparatus 102 is detachably connected to the receptacle 404 via the USB cable 106.

[0098] The power receiving device 300 receives power from the electronic apparatus 102, and charges a charging circuit 410. The power receiving device 300 includes the charging circuit 302, the USB port controller 500, a bus switch SW21, and capacitors C21 and C22.

[0099] The charging circuit 410 receives the bus voltage V.sub.BUS from the feeding device 200 via the USB cable 106 and the bus switch SW21, and charges the battery 402. On the power receiving device 300 side, the bus voltage V.sub.BUS will be referred to also as an input voltage, and described as V.sub.BUS_SNK . The charging circuit 410 is constituted by a step-down DC/DC converter, a linear regulator, or a combination thereof.

[0100] A system voltage V.sub.SYS corresponding to at least one of the bus voltage V.sub.BUS_SNK and a voltage V.sub.BAT of the battery 402 is supplied from the charging circuit 410 to the load circuit 406. The load circuit 406 includes a multi-channel power supply including a power management integrated circuit (IC), a DC/DC converter, a linear regulator, and other components, a microcomputer, a liquid crystal display, a display driver, and other components.

[0101] The capacitors C21 and C22 are connected to both ends of the bus switch SW21.

[0102] The USB port controller 500 includes a CC pin circuit 510 and a processor 530. The CC pin circuit 510 includes a pull-down resistance that pulls down the CC pins. Incidentally, in a case where the power receiving device 300 has a DPR that allows switching between the sink and the source, the CC pin circuit 510 is configured to be switchable between a state in which the CC pins are pulled down (that is, the sink) and a state in which the CC pins are pulled up (that is, the source).

[0103] As described above, the USB port controller 500 performs negotiation with the USB port controller 600 via the CC lines. A transceiver for communication via the CC lines is included in the CC pin circuit 510.

[0104] Data (PDO) that defines the bus voltage V.sub.BUS requested by the power receiving device 300 and a maximum current is defined in the USB port controller 500. When the electronic apparatus 102 and the electronic apparatus 400 are connected to each other, the USB port controller 600 and the USB port controller 500 perform negotiation, and determine the voltage level of the bus voltage V.sub.BUS on the basis of the PDO. In addition, the USB port controller 500 performs on-off control of the bus switch SW2. The processor 530 executes a software program, and thereby performs negotiation with the USB port controller 600. The processor 530 may be a microcontroller independent of the USB port controller 500.

[0105] A configuration of the feeding system 100 has been described above. Operating thereof will next be described.

[0106] FIG. 6 is a diagram of assistance in explaining operation in a normal case after the disconnection of the feeding device 200 and the power receiving device 300 from each other in the feeding system 100 of FIG. 3.

[0107] Before time t.sub.A, a bus voltage V.sub.BUS_SRC of 24 V is supplied from the feeding device 200 to the power receiving device 300. When the cable is extracted at time t.sub.A, and thereby the feeding device 200 and the power receiving device 300 are disconnected from each other, the bus switch SW11 is turned off. Then, at time t.sub.B, the discharge switch SW12 is turned on, and thus discharge via the discharge resistance R12 is started. When the feeding device 200 is normal, the voltage V.sub.BUS sBc decreases with time after time t.sub.B.

[0108] Thereafter, detected voltages V.sub.DET1, V.sub.DET2, V.sub.DETn are obtained at respective detection times t.sub.1, t.sub.2, . . . t.sub.n . The detection times may be at equal intervals (for example, 50 ms), or may be at unequal intervals. The detected voltage V.sub.DETi at each time is lower than the threshold voltage V.sub.THi. Thus, progress is made to a final detection time t.sub.n, and a normal ending is performed.

[0109] FIG. 7 is a diagram of assistance in explaining operation in an abnormal case after the disconnection of the feeding device 200 and the power receiving device 300 from each other in the feeding system 100 of FIG. 3. Here, suppose that an abnormality occurs in which the bus switch SW11 is not turned off. In this case, the output voltage V.sub.BUS_SRC of the feeding device 200 continues to maintain the original voltage level of 24 V.

[0110] At this time, the voltage V.sub.DET1 detected at time ti is 24 V. Thus, the voltage V.sub.DET1 is higher than the threshold voltage V.sub.TH1, so that an abnormality is determined. Then, the discharge switch SW12 is immediately turned off without waiting for a next time t.sub.2, and an abnormal ending is performed.

[0111] FIG. 8 is a diagram of assistance in explaining another operation in an abnormal case after the disconnection of the feeding device 200 and the power receiving device 300 from each other in the feeding system 100 of FIG. 3. Here, examined will be an abnormality in which, after the feeding device 200 determines that the power receiving device 300 is disconnected, the power receiving device 300 is not disconnected in actuality, and the power receiving device 300 becomes a source and supplies a voltage of 5 V to the V.sub.BUS terminal of the feeding device 200.

[0112] In this case, the output voltage V.sub.BUS_SRC of the feeding device 200 decreases from 24 V to 5 V, and thereafter maintains 5 V. At time t.sub.j, the detected voltage V.sub.DETi is higher than the threshold voltage V.sub.TH. Thus, an abnormality is determined, the discharge switch SW12 is turned off, and an abnormal ending is performed.

[0113] Operation of the feeding device 200 has been described above. Advantages of the feeding device 200 will be described.

[0114] When the circuit is normal, the output voltage V.sub.BUS_SRC occurring at the V.sub.BUS terminal decreases with time as the discharge of the capacitor C12 progresses, and the power consumption of the discharge resistance R12 also decreases with time. Accordingly, an abnormality can be detected by monitoring a temporal change in the output voltage V.sub.BUS_SRC and determining whether the output voltage or the power consumption is decreasing as expected.

[0115] Advantages of the present embodiment are clarified by comparison with a comparative technology. In the comparative technology, the output voltage V.sub.BUS_SRC is compared with a threshold voltage V.sub.TH in the vicinity of 0 V (which threshold voltage may, for example, be vSafe0V set by the standard) only once after the passage of a sufficient time after the discharge switch SW12 is turned on (corresponding to the final detection time t.sub.n in the embodiment). An abnormality is determined when V.sub.BUS_SRC > V.sub.TH

[0116] FIG. 9 is a diagram of assistance in explaining operation in an abnormal state in the comparative technology. Here, as in FIG. 7, suppose that there occurs an abnormality in which the bus switch SW11 is not turned off. In this case, the output voltage V.sub.BUS_SRC of the feeding device 200 continues to maintain the original voltage level of 24 V.

[0117] In the comparative technology, the discharge switch SW12 continues to be on until a time corresponding to the final detection time t.sub.n. When it is detected that the output voltage V.sub.BUS_SRC is higher than the threshold voltage V.sub.TH at the final detection time t.sub.n, an abnormality state is determined, the discharge switch SW12 is turned off, and an abnormal ending is performed.

[0118] In the comparative technology, a discharge current as a direct current continues to flow through the discharge resistance R12 over a long period ΔTx of t.sub.A to t.sub.n. In a case where a maximum value of the output voltage V.sub.BUS selectable in the feeding device 200 is V.sub.MAX, the power consumption of the discharge resistance R12 is as follows.

P=V.sub.MAX.sup.2/R

Thus, a part whose rating is higher than this power consumption needs to be selected as the discharge resistance R12.

[0119] On the other hand, in the present embodiment, even in an abnormal state, the consumption of the power of V.sub.MAX.sup.2/R is limited to a short interval ΔTy of t.sub.B to t.sub.1 in FIG. 7.

[0120] There is a concept of one-pulse limit power (pulse limit power) for the rated power of a resistance. FIG. 10 is a diagram indicating the one-pulse limit power. An axis of abscissas indicates a pulse width, and an axis of ordinates indicates the one-pulse limit power. Ordinary rated power represents power that can be consumed continuously, whereas the one-pulse limit power represents power tolerated when a voltage in a pulse form is applied. The shorter the pulse width, the higher the one-pulse limit power.

[0121] FIG. 10 depicts the one-pulse limit power of two resistances of different rated powers. In the comparative technology, the power of V.sub.MAX.sup.2/R is consumed for a period of a pulse width ΔTx. Hence, a part having a characteristic (i) needs to be selected.

[0122] On the other hand, in the present embodiment, the power of V.sub.MAX.sup.2/R is consumed for a period of a pulse width ΔTy (<ΔTx). Hence, it suffices to select a part having a characteristic (ii). That is, according to the present embodiment, it is possible to select a resistance part having a low rated power as compared with the comparative technology, and thus miniaturize the discharge resistance R12 or reduce the cost of the discharge resistance R12. An area of the discharge resistance R12 can be reduced in a case where the discharge resistance R12 is integrated in the USB port controller 600, as will be described later.

[0123] A second abnormality detecting method will next be described.

[0124] The abnormality detector 620 calculates power Pi on the basis of the output voltage V.sub.DETi detected at each time ti (i =1, 2, . . . n).

Pi=V.sub.DETi .sup.2/R

[0125] The abnormality detector 620 obtains total power P.sub.TOTALi by integrating power Pi to Pi calculated thus far at each time t.sub.i.

P.sub.TOTALi=P.sub.TOTALi−1+P.sub.i=Σj=1: .sub.iP.sub.j

[0126] Then, an abnormality is determined when the integrated total power P.sub.TOTALi exceeds a predetermined threshold value P.sub.TH. The threshold value P.sub.TH is determined according to the voltage level of the bus voltage V.sub.BUS during an immediately preceding feeding period.

[0127] FIG. 11 is a flowchart of assistance in explaining the second abnormality detecting method.

[0128] First, the discharge switch SW12 is turned on, and discharge is thereby started (S200). The abnormality detector 620 sets i=1, sets a first detection time ti, and initializes total power P.sub.TOTAL0 (S202).

[0129] Then, at each time ti (i=1, 2, . . . n), the output voltage V.sub.BUS_SRCi is detected, and thereby a voltage V.sub.DETi is obtained (S204). Then, power P.sub.i is calculated on the basis of the detected voltage V.sub.DETi (S206), the power P.sub.i is added to the total power P.sub.TOTALi-1 up to a previous time, and the total power P.sub.TOTALi is thereby updated (S208).

[0130] Next, the abnormality detector 620 compares the total power P.sub.TOTALi with the threshold value P.sub.TH (S210). An abnormality is determined (S212) when P.sub.TOTALi > P.sub.TH (Y in S210). When the abnormality is determined, the switch SW12 is turned off immediately (S214), and an abnormal ending is performed.

[0131] When P.sub.TOTALi <P.sub.TH in processing S210 (N in S210), normality is determined, and whether the final detection time has arrived is checked (S216). When the final detection time has arrived (i=n) (Y in S216), it is determined that the discharge is completed normally, and a normal ending is performed. When the final detection time has not arrived (i<n) (N in S216), i is incremented, and a wait is made until a next time t.sub.i+1 (S218). Then, a return is made to processing S204.

[0132] The second abnormality determining method has been described above.

[0133] The second abnormality detecting method can provide effects similar to those of the first abnormality detecting method.

(Modifications)

[0134] The foregoing embodiments are illustrative, and it is understood by those skilled in the art that combinations of constituent elements and processes of those embodiments are susceptible of various modifications. Such modifications will be described in the following.

(First Modification)

[0135] FIG. 12 is a circuit diagram of a feeding device 200A according to a first modification. In this modification, the discharge switch SW12 is integrated in a USB port controller 600A. Others are similar to those of FIG. 3.

(Second Modification)

[0136] FIG. 13 is a circuit diagram of a feeding device 200B according to a second modification. In this modification, the discharge switch SW12 and the discharge resistance R12 are integrated in a USB port controller 600B. In the comparative technology, the discharge resistance R12 needs to be designed in consideration of continuous rated power (or pulse limit power of a very long pulse), and therefore, when the discharge resistance R12 is to be integrated in the USB port controller 600, the area of the discharge resistance R12 is increased greatly.

[0137] On the other hand, in the present embodiment, the discharge resistance R12 can be designed on the basis of the pulse limit power of a very short pulse width rather than the continuous rated power. Therefore, when the discharge resistance R12 is to be integrated, the area of the discharge resistance R12 can be reduced.

[0138] The embodiments are illustrative, and it is to be understood by those skilled in the art that there are various modifications of combinations of constituent elements and processes of those embodiments and that such modifications are also included in the scope of the present disclosure or the present invention.